and software-compatible 16-bit and 12-bit DACs. The
MAX5134/MAX5135 are low-power, quad 16-/12-bit,
buffered voltage-output, high-linearity DACs. The
MAX5136/MAX5137 are low-power, dual 16-/12-bit,
buffered voltage-output, high-linearity DACs. They use
a precision internal reference or a precision external ref-
erence for rail-to-rail operation. The MAX5134–MAX5137
accept a wide +2.7V to +5.25V supply-voltage range to
accommodate most low-power and low-voltage applica-
tions. These devices accept a 3-wire SPI-/QSPI
TM
-/
MICROWIRE
®
-/DSP-compatible serial interface to save
board space and reduce the complexity of optically iso-
lated and transformer-isolated applications. The digital
interface’s double-buffered hardware and software
LDAC
provide simultaneous output updates. The serial
interface features a
READY
output for easy daisy-chain-
ing of several MAX5134–MAX5137 devices and/or other
compatible devices. The MAX5134–MAX5137 include a
hardware input to reset the DAC outputs to zero or mid-
scale upon power-up or reset, providing additional safety
for applications that drive valves or other transducers
that need to be off during power-up. The high linearity of
the DACs makes these devices ideal for precision con-
trol and instrumentation applications. The MAX5134–
MAX5137 are available in an ultra-small (4mm x 4mm),
24-pin TQFN package or a 16-pin TSSOP package. Both
packages are specified over the -40°C to +105°C
extended industrial temperature range.
Features
o
16-/12-Bit Resolution Available in a 4mm x 4mm,
24-Pin TQFN Package or 16-Pin TSSOP
o
Hardware-Selectable to Zero/Midscale DAC
Output on Power-Up or Reset
o
Double-Buffered Input Registers
o
LDAC
Asynchronously Updates DAC Outputs
Simultaneously
o
READY
Facilitates Daisy Chaining
o
High-Performance 10ppm/°C Internal Reference
o
Guaranteed Monotonic Over All Operating
Conditions
o
Wide +2.7V to +5.25V Supply Range
o
Rail-to-Rail Buffered Output Operation
o
Low Gain Error (Less Than ±0.5%FS) and Offset
(Less Than ±10mV)
o
30MHz 3-Wire SPI-/QSPI-/MICROWIRE-/
DSP-Compatible Serial Interface
o
CMOS-Compatible Inputs with Hysteresis
o
Low-Power Consumption (I
SHDN
= 2µA max)
Ordering Information
PART
MAX5134AGTG+
MAX5134AGUE+
MAX5135GTG+
MAX5135GUE+
MAX5136AGTG+
MAX5136AGUE+
MAX5137GTG+
PIN-
PACKAGE
24 TQFN-EP*
16 TSSOP
24 TQFN-EP*
16 TSSOP
24 TQFN-EP*
16 TSSOP
24 TQFN-EP*
RESOLUTION
(BITS)
16 Quad
16 Quad
12 Quad
12 Quad
16 Dual
16 Dual
12 Dual
INL
(LSB)
±8
±8
±1
±1
±8
±8
±1
Applications
Automatic Test Equipment
Automatic Tuning
Communication Systems
Data Acquisition
Gain and Offset Adjustment
Portable Instrumentation
Power-Amplifier Control
Process Control and Servo Loops
Programmable Voltage and Current Sources
MAX5137GUE+
16 TSSOP
12 Dual
±1
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
Note:
All devices are specified over the -40°C to +105°C oper-
ating temperature range.
Functional Diagrams, Pin Configurations, and Typical
Operating Circuit appear at end of data sheet.
QSPI is a trademark of Motorola Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-4209; Rev 4; 11/13
MAX5134–MAX5137
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
ABSOLUTE MAXIMUM RATINGS
AVDD to GND...........................................................-0.3V to +6V
DVDD to GND...........................................................-0.3V to +6V
OUT0–OUT3 to GND ....................................-0.3V to the lower of
(AVDD + 0.3V) and +6V
REFI, REFO, M/Z to GND .............................-0.3V to the lower of
(AVDD + 0.3V) and +6V
SCLK, DIN,
CS
to GND ................................-0.3V to the lower of
(DVDD + 0.3V) and +6V
LDAC, READY
to GND .................................-0.3V to the lower of
(DVDD + 0.3V) and +6V
Continuous Power Dissipation (T
A
= +70°C)
24-Pin TQFN (derate at 27.8mW/°C above +70°C)....2222.2mW
16-Pin TSSOP (derate at 11.1mW/°C above +70°C)....888.9mW
Maximum Current into Any Input or Output
with the Exception of M/Z Pin .......................................±50mA
Maximum Current into M/Z Pin ...........................................±5mA
Operating Temperature Range .........................-40°C to +105°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
) ............36°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ...................3°C/W
Note 1:
TSSOP
Junction-to-Ambient Thermal Resistance (θ
JA
) ............90°C/W
Junction-to-Case Thermal Resistance (θ
JC
) .................27°C/W
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
AVDD
= 2.7V to 5.25V, V
DVDD
= 2.7V to 5.25V, V
AVDD
≥
V
DVDD
, V
GND
= 0V, V
REFI
= V
AVDD
- 0.25V, C
OUT
= 200pF, R
OUT
= 10kΩ,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
STATIC ACCURACY (Notes 1, 2)
Resolution
Integral Nonlinearity
(MAX5134/MAX5136)
Integral Nonlinearity
(MAX5135/MAX5137)
Differential Nonlinearity
Offset Error
Offset-Error Drift
Gain Error
Gain Temperature Coefficient
REFERENCE INPUT
V
AVDD
= 3V to 5.25V
Reference-Input Voltage Range
Reference-Input Impedance
V
REFI
V
AVDD
= 2.7V to 3V
2
2
113
V
AVDD
V
AVDD
- 0.2
V
k
GE
(Note 4)
-0.5
N
INL
INL
DNL
OE
MAX5134/MAX5136
MAX5135/MAX5137
V
REFI
= 5V,
V
AVDD
= 5.25V
(Note 3)
T
A
= +25°C
-1
-1.0
-10
±1
±4
±0.2
±2
+0.5
+0.25
16
12
-8
±2
+10
±6
+1
+1.0
+10
Bits
LSB
LSB
LSB
mV
μV/°C
% of FS
ppm
FS/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
REFI
= 5V, V
AVDD
= 5.25V
Guaranteed monotonic
(Note 4)
2
Maxim Integrated
MAX5134–MAX5137
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= 2.7V to 5.25V, V
DVDD
= 2.7V to 5.25V, V
AVDD
≥
V
DVDD
, V
GND
= 0V, V
REFI
= V
AVDD
- 0.25V, C
OUT
= 200pF, R
OUT
= 10kΩ,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
INTERNAL REFERENCE
Reference Voltage
Reference Temperature Coefficient
Reference Output Impedance
Line Regulation
Maximum Capacitive Load
DAC OUTPUT VOLTAGE (Note 2)
Output Voltage Range
DC Output Impedance
Maximum Capacitive Load
(Note 5)
Resistive Load
Short-Circuit Current
Power-Up Time
C
L
R
L
I
SC
V
AVDD
= 5.25V
V
AVDD
= 2.7V
From power-down mode
0.7 x
V
DVDD
0.3 x
V
DVDD
V
IN
= 0 or V
DVDD
-1
±0.1
+1
10
V
DVDD
- 0.5
0.4
1.25
5
0.5
25
10kHz
1Hz to 10kHz
120
18
25
-40
Series resistance = 0
Series resistance = 500
2
±35
±20
25
+40
No load
0.02
0.1
0.2
15
nF
μF
k
mA
μs
V
AVDD
- 0.02
V
C
R
V
REFO
T
A =
+25°C
(Note 5)
2.437
2.440
10
1
100
0.1
ppm/V
nF
2.443
25
V
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (SCLK, DIN,
CS, LDAC)
(Note 6)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
DIGITAL OUTPUTS (READY)
Output High Voltage
Output Low Voltage
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate
Voltage-Output Settling Time
Digital Feedthrough
Major Code Transition Analog
Glitch Impulse
Output Noise
Integrated Output Noise
DAC-to-DAC Crosstalk
SR
t
S
Positive and negative
1/4 scale to 3/4 scale V
REFI
= V
AVDD
= 5V
settle to ±2 LSB (Note 5)
Code 0, all digital inputs from 0 to V
DVDD
V/μs
μs
nV•s
nV•s
nV/
Hz
μV
nV•s
V
OH
V
OL
I
SOURCE
= 3mA
I
SINK
= 2mA
V
V
V
IH
V
IL
I
IN
C
IN
V
V
μA
pF
Maxim Integrated
3
MAX5134–MAX5137
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= 2.7V to 5.25V, V
DVDD
= 2.7V to 5.25V, V
AVDD
≥
V
DVDD
, V
GND
= 0V, V
REFI
= V
AVDD
- 0.25V, C
OUT
= 200pF, R
OUT
= 10kΩ,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
POWER REQUIREMENTS (Note 7)
Analog Supply Voltage Range
V
AVDD
Digital Supply Voltage Range
V
DVDD
I
AVDD
Supply Current
No load, all digital inputs at 0 or DVDD
(MAX5134/MAX5135)
I
DVDD
I
AVDD
Supply Current
No load, all digital inputs at 0 or DVDD
(MAX5136/MAX5137)
I
DVDD
I
AVPD
Power-Down Supply Current
No load, all digital inputs at 0 or DVDD
I
DVPD
TIMING CHARACTERISTICS (Note 8) (Figure 1)
Serial-Clock Frequency
f
SCLK
SCLK Pulse-Width High
t
CH
SCLK Pulse-Width Low
t
CL
CS
Fall-to-SCLK Fall Setup Time
t
CSS
SCLK Fall-to
CS-Rise
Hold Time
t
CSH
DIN-to-SCLK Fall Setup Time
t
DS
DIN-to-SCLK Fall Hold Time
t
DH
SCLK Fall to
READY
Transition
t
SRL
(Note 9)
CS
Pulse-Width High
t
CSW
LDAC
Pulse Width
t
LDACPWL
MIN
2.7
2.7
2.5
1
1.5
1
0.2
0.1
0
13
13
8
5
10
2
33
33
TYP
MAX
5.25
V
AVDD
3.6
10
2.3
10
2
2
30
UNITS
V
V
mA
μA
mA
μA
μA
30
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Static accuracy tested without load.
Linearity is tested within 20mV of GND and AVDD
,
allowing for gain and offset error.
Codes above 2047 are guaranteed to be within ±8 LSB
.
Gain and offset tested within 100mV of GND and AVDD
.
Guaranteed by design.
Device draws current in excess of the specified supply current when a digital input is driven with a voltage of VI < V
DVDD
- 0.6V
or VI > 0.5V. At VI = 2.2V with V
DVDD
= 5.25V, this current can be as high as 2mA. The SPI inputs are CMOS-input level com-
patible. The 30MHz clock frequency cannot be guaranteed for a minimum signal swing.
Note 7:
Excess current from AVDD is 10mA when powered without DVDD. Excess current from DVDD is 1mA when powered without
AVDD.
Note 8:
All timing specifications are with respect to the digital input and output thresholds.
Note 9:
Maximum daisy-chain clock frequency is limited to 25MHz.
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