AUTOMOTIVE GRADE
Features
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AUIRFR8405
AUIRFU8405
HEXFET
®
Power MOSFET
Advanced Process Technology
New Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified
*
V
DSS
R
DS(on)
typ.
max.
I
D (Silicon Limited)
I
D (Package Limited)
D
D
D
40V
1.65mΩ
1.98mΩ
211A
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching
speed and improved repetitive avalanche rating. These features
combine to make this design an extremely efficient and reliable device
for use in Automotive applications and wide variety of other applications.
c
100A
Applications
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G
S
S
G
Electric Power Steering (EPS)
Battery Switch
Start/Stop Micro Hybrid
Heavy Loads
DC-DC Converter
Standard Pack
Form
Tube
Tape and Reel
Tape and Reel Left
Tape and Reel Right
Tube
D-Pak
AUIRFR8405
S
D
G
I-Pak
AUIRFU8405
G
D
S
Gate
Quantity
75
2000
3000
3000
75
Drain
Source
Ordering Information
Base part
Package Type
AUIRFR8405
DPak
Complete Part Number
AUIRFR8405
AUIRFR8405TR
AUIRFR8405TRL
AUIRFR8405TRR
AUIRFU8405
AUIRFU8405
IPak
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional
operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions
for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air
conditions. Ambient temperature (T
A
) is 25°C, unless otherwise specified.
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Package Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Max.
211
150
100
804
163
1.1
± 20
-55 to + 175
Units
A
d
l
W
W/°C
V
°C
300
208
256
See Fig. 14, 15, 24a, 24b
Avalanche Characteristics
E
AS (Thermally limited)
E
AS (tested)
I
AR
E
AR
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
e
Ãd
e
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
R
θ
JA
d
j
Parameter
Junction-to-Case
Junction-to-Ambient (PCB Mount)
Junction-to-Ambient
kl
Typ.
–––
–––
–––
Max.
0.92
50
110
Units
°C/W
HEXFET
®
is a registered trademark of International Rectifier.
*Qualification
standards can be found at http://www.irf.com/
1
www.irf.com
©
2013 International Rectifier
April 30, 2013
AUIRFR/U8405
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
ΔV
(BR)DSS
/ΔT
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
Min. Typ. Max. Units
40
–––
–––
2.2
–––
–––
–––
–––
–––
–––
0.03
1.65
3.0
–––
–––
–––
–––
2.3
Conditions
–––
V V
GS
= 0V, I
D
= 250μA
––– V/°C Reference to 25°C, I
D
= 5mA
1.98 mΩ V
GS
= 10V, I
D
= 90A**
3.9
V V
DS
= V
GS
, I
D
= 100μA
1.0
V
DS
= 40V, V
GS
= 0V
μA
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
150
V
GS
= 20V
100
nA
-100
V
GS
= -20V
Ω
–––
g
d
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
294
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
103
26
38
65
12
80
51
51
5171
770
523
939
1054
–––
155
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
V
DS
= 10V, I
D
= 90A**
I
D
= 90A **
V
DS
=20V
V
GS
= 10V
I
D
= 90A **, V
DS
=0V, V
GS
= 10V
V
DD
= 26V
I
D
= 90A**
R
G
= 2.7Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 32V , See Fig. 11
V
GS
= 0V, V
DS
= 0V to 32V
g
g
ns
pF
i
h
Diode Characteristics
Symbol
I
S
I
SM
V
SD
dv/dt
t
rr
Q
rr
I
RRM
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
–––
––– 211
–––
0.9
2.1
28
29
19
20
1.1
Ãd
804
l
1.3
–––
–––
–––
–––
–––
–––
Conditions
MOSFET symbol
D
A
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 90A**
G
Peak Diode Recovery
Reverse Recovery Time
e
V
Reverse Recovery Charge
Reverse Recovery Current
V/ns T
J
=
T
J
=
ns
T
J
=
T
J
=
nC
T
J
=
A T
J
=
175°C, I
S
= 90A**, V
DS
= 40V
25°C
V
R
= 34V,
125°C
I
F
= 90A**
di/dt = 100A/μs
25°C
125°C
25°C
Ã
, V
GS
= 0V
g
S
g
Calculated continuous current based on maximum allowable
junction temperature. Bond wire current limit is 100A
by source
bonding technology.
Note that current limitations arising from heating
of the device leads may occur with some lead mounting arrangements.
(Refer to AN-1140)
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques
refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
Pulse drain current is limited by source bonding technology.
**
All AC and DC test condition based on old Package
limitation current = 90A.
Repetitive rating; pulse width limited by max. junction temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.051mH, R
G
= 50Ω,
I
AS
= 90A, V
GS
=10V. Part not recommended for use above
this value.
I
SD
≤
90A, di/dt
≤
1304A/μs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400μs; duty cycle
≤
2%.
2
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©
2013 International Rectifier
April 30, 2013
AUIRFR/U8405
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.8V
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.8V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
4.8V
4.8V
10
≤
60μs
PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
≤
60μs
PULSE WIDTH
Tj = 175°C
10
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 2.
Typical Output Characteristics
2.0
ID = 90A
1.6
VGS = 10V
ID, Drain-to-Source Current (A)
100
T J = 175°C
10
T J = 25°C
1.2
1
VDS = 10V
≤60μs
PULSE WIDTH
0.1
2
3
4
5
6
7
8
0.8
0.4
-60
-20
20
60
100
140
180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
14.0
VGS, Gate-to-Source Voltage (V)
12.0
10.0
8.0
6.0
4.0
2.0
0.0
ID = 90A
VDS= 32V
VDS= 20V
C, Capacitance (pF)
10000
Ciss
Coss
1000
Crss
100
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0
20
40
60
80
100
120
140
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
3
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©
2013 International Rectifier
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
April 30, 2013
AUIRFR/U8405
1000
10000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
ISD, Reverse Drain Current (A)
100
T J = 175°C
ID, Drain-to-Source Current (A)
1000
100μsec
100
Limited by Package
10
TJ = 25°C
10msec
10
1msec
DC
1
VGS = 0V
0.1
0.2
0.6
1.0
1.4
1.8
VSD, Source-to-Drain Voltage (V)
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
0.1
10
100
VDS, Drain-to-Source Voltage (V)
240
210
180
150
120
90
60
30
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Limited By Package
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
48
Id = 5.0mA
47
46
45
44
43
42
41
40
-60
-20
20
60
100
140
180
T J , Temperature ( °C )
ID, Drain Current (A)
Fig 9.
Maximum Drain Current vs.
Case Temperature
EAS , Single Pulse Avalanche Energy (mJ)
Fig 10.
Drain-to-Source Breakdown Voltage
900
800
700
600
500
400
300
200
100
0
ID
TOP
18A
37A
BOTTOM 90A
0.8
0.7
0.6
Energy (μJ)
0.5
0.4
0.3
0.2
0.1
0.0
-5
0
5
10 15 20 25 30 35 40 45
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
4
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©
2013 International Rectifier
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
April 30, 2013
AUIRFR/U8405
10
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
0.0001
1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
0.05
10
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj
= 150°C and
Tstart =25°C (Single Pulse)
1.0E-03
tav (sec)
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
250
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 90A
EAR , Avalanche Energy (mJ)
200
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 24a, 24b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15.
Maximum Avalanche Energy vs. Temperature
5
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©
2013 International Rectifier
April 30, 2013
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