CTSLV399TG: 产品描述Clock Buffer LVPECL/LVDS Osc Gain Buff w/Select Enable; 产品类别逻辑逻辑; 文件大小336KB，共10页; 制造商CTS [CTS Corporation]

下载文档详细参数选型对比全文预览

CTSLV399TG在线购买

供应商	器件名称	价格	最低购买	库存
	CTSLV399TG	-	-	点击查看	点击购买

CTSLV399TG概述

Clock Buffer LVPECL/LVDS Osc Gain Buff w/Select Enable

CTSLV399TG规格参数

参数名称	属性值
厂商名称	CTS [CTS Corporation]
包装说明	,
Reach Compliance Code	unknown
逻辑集成电路类型	LOW SKEW CLOCK DRIVER

文档预览

下载PDF文档

全文
预览

CTSLV399

LVPECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable

MLP8, MSOP8

Not recommended for new designs

BLOCK DIAGRAM

FEATURES



Minimizes External Components

Selectable Enable Polarity and Threshold

(CMOS or PECL)

3V to 5.5V Power Supply

Similar Operation as CTS100LVEL16VT

Except with LVDS Outputs

DESCRIPTION

The CTSLV399 is a specialized oscillator gain stage with an LVDS output buffer including an enable. The

selectable enable input allows continuous oscillator operation by only controlling the Q

outputs.

The CTSLV399 provides adjustable internal pull-down current sources for the Q/Q outputs. Internal input

biasing further reduces the number of needed external components

ENGINEERING NOTES

The CTSLV399 is a specialized oscillator gain stage with LVDS output buffer including an enable. The

enable input (EN) allows continuous oscillator operation by only controlling the Q

outputs.

The CTSLV399 also provides a V

and 470 internal bias resistors from D to V

and D to V

. The V

pin can support 1.5 mA sink/source current. Bypassing V

to ground with a 0.01

F

capacitor is

recommended.

Functionality MLP8 Package (CTSLV399NG)

The MLP8, NG options of the CTSLV399, provide a PECL/ECL level enable input (¯¯¯). When the ¯¯¯

input is LOW, the Q and Q

outputs pass data from the inputs. When ¯¯¯ is HIGH, the Q output

continues to pass data while the Q

output is forced high and the Q

output is forced low.

Only the Q output operates with a current source (4 mA) to V

. This is accomplished by internal bonding

of CS-SEL. An external resistor may also be used to increase pull-down current to a maximum of 25mA

(includes 4mA on-chip current source).

The CTSLV399NB and CTSLV399ND versions operate with a single ended data input (D). The D input is

internally bonded directly to the V

pin bypassing the 470 bias resistor.

Functionality MLP8 Package (CTSLV399N) & MSOP8 Package (CTSLV399T)

The MSOP8 (T) and MLP8 (N) versions of the CTSLV399 provide a CMOS/TTL level enable input (EN).

When the EN input is HIGH, the Q and Q

outputs pass data from the inputs. When EN is LOW, the

Q output continues to pass data while the Q

output is forced high and the Q

output is forced low.

Only the Q output operates with a current source (4 mA) to V

. This is accomplished by internal bonding

of CS-SEL. An external resistor may also be used to increase pull-down current to a maximum of 25mA

(includes 4mA on-chip current source).

The MSOP8 (T) and MLP8 (N) CTSLV399 operates with a single ended data input (D). The D input is

internally bonded directly to the V

pin bypassing the 470 bias resistor.

North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors

Specifications are subject to change without notice.

RevA0215

CTSLV399TG相似产品对比

	CTSLV399TG	CTSLV399NG
描述	Clock Buffer LVPECL/LVDS Osc Gain Buff w/Select Enable	Clock Buffer LVPECL/LVDS Osc Gain Buff w/Select Enable
厂商名称	CTS [CTS Corporation]	CTS [CTS Corporation]
Reach Compliance Code	unknown	unknown
逻辑集成电路类型	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER

CTSLV399TG

CTSLV399TG在线购买

CTSLV399TG概述

CTSLV399TG规格参数

文档预览

CTSLV399TG相似产品对比

推荐资源