Philips Semiconductors
Product data
8-bit universal shift/storage register (3-State)
74F299
FEATURES
•
Common parallel I/O for reduced pin count
•
Additional serial inputs and outputs for expansion
•
Four operating modes: Shift left, shift right, load and store
•
3-State outputs for bus-oriented applications
DESCRIPTION
The 74F299 is an 8-bit universal shift/storage register with 3-State
outputs. Four modes of operation are possible: Hold (store), shift
left, shift right and parallel load. The parallel load inputs and flip-flop
outputs are multiplexed to reduce the total number of package pins.
Additional outputs are provided for flip-flops Q0 and Q7 to allow
easy serial cascading. A separate active-LOW Master Reset is used
to reset the register.
The 74F299 contains eight edge-triggered D-type flip-flops and the
interstage logic necessary to perform synchronous shift left, shift
right, parallel load and hold operations. The type of operation is
determined by S0 and S1, as shown in the Function Table. All
flip-flop outputs are brought out through 3-State buffers to separate
I/O pins that also serve as data inputs in the parallel load mode.
Q0 and Q7 are also brought out on other pins for expansion in serial
shifting of longer words.
A LOW signal on MR overrides the Select and CP inputs and resets
the flip-flops. All other state changes are initiated by the rising edge
of the clock. Inputs can change when the clock is in either state
provided only that the recommended set-up and hold times, relative
to the rising edge of clock are observed.
A HIGH signal on either OE0 or OE1 disables the 3-State buffers
and puts the I/O pins in the high impedance state. In this condition
the shift, hold, load and reset operations can still occur. The 3-State
buffers are also disabled by High signals on both S0 and S1 in
preparation for a parallel load operation.
PIN CONFIGURATION
S0
OE0
OE1
I/O6
I/O4
I/O2
I/O0
Q0
MR
1
2
3
4
5
6
7
8
9
20 V
CC
19 S1
18 DS7
17 Q7
16 I/O7
15 I/O5
14 I/O3
13 I/O1
12 CP
11 DS0
GND 10
SF00865
TYPE
74F299
TYPICAL f
MAX
115 MHz
TYPICAL
SUPPLY CURRENT
(TOTAL)
58 mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL
RANGE
V
CC
= 5 V
±10%,
T
amb
= 0
°C
to +70
°C
N74F299N
N74F299D
PKG DWG #
20-pin plastic DIP
20-pin plastic SOL
SOT146-1
SOT163-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DS0
DS7
S0, S1
CP
MR
OE0, OE1
Q0, Q7
I/On
Serial data input for right shift
Serial data input for left shift
Mode select inputs
Clock pulse input (Active rising edge)
Asynchronous Master Reset input (Active LOW)
Output Enable input (Active LOW)
Serial outputs
Multiplexed parallel data inputs
DESCRIPTION
74F(U.L.)
HIGH / LOW
1.0 / 1.0
1.0 / 1.0
1.0 / 2.0
1.0 / 1.0
1.0 / 1.0
1.0 / 1.0
50 / 33
3.5 / 1.0
LOAD VALUE
HIGH / LOW
20
µA
/ 0.6 mA
20
µA
/ 0.6 mA
20
µA
/ 1.2 mA
20
µA
/ 0.6 mA
20
µA
/ 0.6 mA
20
µA
/ 0.6 mA
1.0 mA / 20 mA
70
µA
/ 0.6 mA
3.0 mA / 24 mA
3-State parallel outputs
150 / 40
NOTE:
One (1.0) FAST Unit Load (U.L.) is defined as: 20
µA
in the HIGH State and 0.6 mA in the LOW state.
2003 Feb 05
2
Philips Semiconductors
Product data
8-bit universal shift/storage register (3-State)
74F299
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
O
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in HIGH output state
Current applied to output in LOW output state
Operating free-air temperature range
Storage temperature
Q0, Q7
I/On
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to +V
CC
40
48
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
O
OH
Supply voltage
HIGH-level input voltage
LOW-level input voltage
Input clamp current
HIGH-level
HIGH level output current
Q0, Q7
I/On
LOW-level
LOW level output current
Operating free-air temperature range
Q0, Q7
I/On
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–1
–3
20
24
70
LIMITS
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
mA
mA
°C
UNIT
I
O
OL
T
amb
2003 Feb 05
5