FemtoClock
®
Crystal-to-LVDS
Clock Generator
General Description
The ICS844011 is a Fibre Channel Clock Generator. The
ICS844011 uses an 18pF parallel resonant crystal. For Fibre
Channel applications, a 26.5625MHz crystal is used. The
ICS844011 has excellent <1ps phase jitter performance, over the
637kHz - 10MHz integration range. The ICS844011 is packaged in a
small 8-pin TSSOP, making it ideal for use in systems with limited
board space.
ICS844011
DATA SHEET
Features
•
•
•
•
•
•
•
•
One differential LVDS clock output pair
Crystal interface designed for 18pF parallel resonant crystals
VCO range: 490MHz – 680MHz
RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal
(637kHz - 10MHz): 0.97ps (typical)
RMS phase jitter @ 100MHz, (637kHz - 10MHz):
0.77ps (typical)
Full 3.3V or 2.5V operating supply
Available in lead-free (RoHS 6) package
0°C to 70°C ambient operating temperature
Common Configuration Table – Fibre Channel
Inputs
Crystal Frequency (MHz)
26.5625
25
M
24
24
N
6
6
Multiplication Value M/N
4
4
Output Frequency (MHz)
106.25
100
Block Diagram
OE
Pullup
Pin Assignment
V
DDA
GND
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
DD
Q
nQ
OE
XTAL_IN
OSC
XTAL_OUT
Phase
Detector
VCO
490MHz - 680MHz
N = ÷6
(fixed)
Q
nQ
M = ÷24
(fixed)
ICS844011
8-lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
ICS844011AG REVISION A AUGUST 27, 2012
1
©2012 Integrated Device Technology, Inc.
ICS844011 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-LVDS CLOCK GENERATOR
Pin Description and Characteristic Tables
Table 1. Pin Descriptions
Number
1
2
3,
4
5
6, 7
8
Name
V
DDA
GND
XTAL_OUT,
XTAL_IN
OE
nQ, Q
V
DD
Power
Power
Input
Input
Output
Power
Pullup
Type
Description
Analog power supply.
Power supply ground.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Output enable pin. LVCMOS/LVTTL interface levels.
Differential clock output. LVDS interface levels.
Core supply pin.
NOTE:
Pullup
refers to an internal input resistor. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
Parameter
Input Capacitance
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
k
Ω
Function Table
Table 3. OE Control Function Table
Input
OE
0
1 (default)
Output Enable
Output Q, nQ pair is disabled in high-impedance state.
Output Q, nQ is enabled.
ICS844011AG REVISION A AUGUST 27, 2012
2
©2012 Integrated Device Technology, Inc.
ICS844011 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-LVDS CLOCK GENERATOR
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
DD
Inputs, V
I
XTAL_IN
Other Input
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
Rating
4.6V
0V to V
DD
-0.5V to V
DD
+ 0.5V
10mA
15mA
129.5°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
DD
= 3.3V±5%, T
A
= 0°C to 70°C
Symbol
V
DD
V
DDA
I
DD
I
DDA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
V
DD
– 0.12
Typical
3.3
3.3
Maximum
3.465
V
DD
108
12
Units
V
V
mA
mA
Table 4B. Power Supply DC Characteristics, V
DD
= 2.5V±5%, T
A
= 0°C to 70°C
Symbol
V
DD
V
DDA
I
DD
I
DDA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
2.375
V
DD
– 0.12
Typical
2.5
2.5
Maximum
2.625
V
DD
102
12
Units
V
V
mA
mA
Table 4C. LVCMOS/LVTTL Input DC Characteristics, V
DD
= 3.3V±5% or 2.5V±5%, T
A
= 0°C to 70°C
Symbol
V
IH
Parameter
Input High Voltage
Test Conditions
V
DD
= 3.3V
V
DD
= 2.5V
Input Low Voltage
Input High Current
Input Low Current
OE
OE
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= V
IN
= 3.465V or 2.625V
V
DD
= 3.465V or 2.625V, V
IN
= 0V
-150
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
DD
+ 0.3
V
DD
+ 0.3
0.8
0.7
5
Units
V
V
V
V
µA
µA
V
IL
I
IH
I
IL
ICS844011AG REVISION A AUGUST 27, 2012
3
©2012 Integrated Device Technology, Inc.
ICS844011 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-LVDS CLOCK GENERATOR
Table 4D. LVDS DC Characteristics,
V
DD
= 3.3V±5%, T
A
= 0°C to 70°C
Symbol
V
OD
∆V
OD
V
OS
∆V
OS
Parameter
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
1.1
1.3
Test Conditions
Minimum
250
Typical
350
Maximum
450
50
1.5
50
Units
mV
mV
V
mV
Table 4E. LVDS DC Characteristics,
V
DD
= 2.5V±5%, T
A
= 0°C to 70°C
Symbol
V
OD
∆V
OD
V
OS
∆V
OS
Parameter
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
0.9
1.2
Test Conditions
Minimum
250
Typical
350
Maximum
450
50
1.5
50
Units
mV
mV
V
mV
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
25
Test Conditions
Minimum
Typical
Fundamental
26.5625
50
7
MHz
Ω
pF
Maximum
Units
ICS844011AG REVISION A AUGUST 27, 2012
4
©2012 Integrated Device Technology, Inc.
ICS844011 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-LVDS CLOCK GENERATOR
AC Characteristics
Table 6A. AC Characteristics, V
DD
= 3.3V±5%, T
A
= 0°C to 70°C
Symbol
f
OUT
Parameter
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
106.25MHz, Integration Range:
637kHz – 10MHz
100MHz, Integration Range:
637kHz – 10MHz
20% to 80%
150
48
Test Conditions
Minimum
100
0.97
0.77
400
52
Typical
Maximum
106.25
Units
MHz
ps
ps
ps
%
tjit(Ø)
t
R
/ t
F
odc
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: Please refer to the phase noise plot.
Table 6B. AC Characteristics, V
DD
= 2.5V±5%, T
A
= 0°C to 70°C
Symbol
f
OUT
Parameter
Output Frequency
106.25MHz, Integration Range:
637kHz – 10MHz
100MHz, Integration Range:
637kHz – 10MHz
20% to 80%
150
48
Test Conditions
Minimum
100
1.26
0.98
400
52
Typical
Maximum
106.25
Units
MHz
ps
ps
ps
%
tjit(Ø)
RMS Phase Jitter (Random)
t
R
/ t
F
odc
Output Rise/Fall Time
Output Duty Cycle
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
ICS844011AG REVISION A AUGUST 27, 2012
5
©2012 Integrated Device Technology, Inc.
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