3. Switching characteristics are independent of operating junction temperature.
Reverse Recovery Time
t
rr
t
a
t
b
Q
RR
ORDERING INFORMATION
Device
NTD20N03L27T4G
NVD20N03L27T4G
Package
DPAK
(Pb−Free)
DPAK
(Pb−Free)
Shipping
†
2500 / Tape & Reel
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
NTD20N03L27, NVD20N03L27
40
−I
D
, DRAIN CURRENT (AMPS)
35
30
25
20
15
10
5
0
0
0.2
0.4
0.6
T
J
= 25°C
40
I
D
, DRAIN CURRENT (AMPS)
V
GS
= 4 V
V
GS
= 4.5 V
V
GS
= 5 V
V
GS
= 6 V
V
GS
= 3.5 V
V
GS
= 3 V
V
GS
= 2.5 V
1.2
1.4
1.6
1.8
2
36
32
28
24
20
16
12
8
4
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
T
J
= 100°C
T
J
= 25°C
T
J
=
−55°C
V
GS
= 10 V
V
GS
= 8 V
V
DS
> = 10 V
0.8
1
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.04
0.035
0.03
0.025
0.02
0.015
0.01
0.005
0
2
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
V
GS
= 5 V
T
J
= 100°C
T
J
= 25°C
T
J
=
−55°C
0.03
T
J
= 25°C
V
GS
= 5 V
0.025
0.02
V
GS
= 10 V
0.015
5
8
12
15
18
22
25
28
32
35
38
0.01
0
4
8
12
16
20
24
28
32
36
40
I
D
, DRAIN CURRENT (AMPS)
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
Figure 3. On−Resistance vs. Drain Current and
Temperature
1.6
1.4
1.2
1
0.8
0.6
−50
1000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
I
D
= 10 A
V
GS
= 5 V
V
GS
= 0 V
T
J
= 125°C
−I
DSS
, LEAKAGE (nA)
100
T
J
= 100°C
10
−25
0
25
50
75
100
125
150
1
0
3
6
9
12
15
18
21
24
27
30
T
J
, JUNCTION TEMPERATURE (°C)
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
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3
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
NTD20N03L27, NVD20N03L27
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
2500
200
12
10
8
V
GS
6
4
2
0
Q
1
Q
2
Q
V
GS
−
V
DS
C, CAPACITANCE (pF)
1500
C
iss
1000
500
0
10 8 6 4 2 0 2
C
oss
C
rss
I
D
= 20 A
T
J
= 25°C
0
2
4
6
8
10
12
14
4 6 8 10 12 14 16 18 20 23 25
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
I
S
, SOURCE CURRENT (AMPS)
20
18
16
14
12
10
8
6
4
2
0
0.0
V
GS
= 0 V
T
J
= 25°C
t, TIME (ns)
100
t
r
t
f
t
d(off)
10
t
d(on)
1
V
DS
= 20 V
I
D
= 20 A
V
GS
= 5.0 V
T
J
= 25°C
10
R
G
, GATE RESISTANCE (W)
100
1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
E
AS
, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
350
300
250
200
150
100
50
0
25
50
75
Figure 10. Diode Forward Voltage vs. Current
I
D
= 24 A
100
125
150
T
J
, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
NTD20N03L27, NVD20N03L27
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE D
A
B
C
A
c2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−−
0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
E
b3
L3
1
4
D
2
3
Z
DETAIL A
H
L4
b2
e
b
0.005 (0.13)
M
c
C
L2
GAUGE
PLANE
H
C
L
L1
DETAIL A
SEATING
PLANE
A1
ROTATED 90 CW
5
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
3.0
0.118
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SCALE 3:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
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