NXP Semiconductors
Data Sheet: Technical Data
K63P144M120SF5
Rev. 7, 10/2016
Kinetis K63F Sub-Family Data
Sheet
120 MHz ARM® Cortex®-M4-based Microcontroller with FPU
The K63 product family members are optimized for cost-sensitive
applications requiring low-power, USB/Ethernet connectivity, up
to 256 KB of embedded SRAM and the need for extensive
tamper protection, such as Electronic Point of Sales. These
devices share the comprehensive enablement and scalability of
the Kinetis family.
MK63FN1M0VLQ12
MK63FN1M0VMD12
This product offers:
144 LQFP
144 MAPBGA
20 x 20 x 1.6 mm Pitch 13 x 13 x 1.46 mm
• Run power consumption down to 250 μA/MHz. Static
0.5 mm
Pitch 1 mm
power consumption down to 5.8 μA with full state retention
and 5 μs wakeup. Lowest Static mode down to 339 nA
• DryIce Tamper Detection with active/passive pin,
temperature, clock, supply voltage monitoring
• USB LS/FS OTG 2.0 with embedded 3.3 V, 120 mA LDO Vreg, with USB device crystal-less operation
• 10/100 Mbit/s Ethernet MAC with MII and RMII interfaces
Performance
• Up to 120 MHz ARM® Cortex®-M4 core with DSP
instructions and floating point unit
Memories and memory interfaces
• Up to 1 MB program flash memory and 256 KB RAM
• FlexBus external bus interface
System peripherals
• Multiple low-power modes, low-leakage wake-up unit
• Memory protection unit with multi-master protection
• 16-channel DMA controller
• External watchdog monitor and software watchdog
Security and integrity modules
• Hardware CRC module
• Tamper detect and secure storage
• Hardware random-number generator
• Hardware encryption supporting DES, 3DES, AES,
MD5, SHA-1, and SHA-256 algorithms
• 128-bit unique identification (ID) number per chip
Analog modules
• Two 16-bit SAR ADCs
• Two 12-bit DACs
• Three analog comparators (CMP)
• Voltage reference
Communication interfaces
• Ethernet controller with MII and RMII interface
• USB full-/low-speed On-the-Go controller
• Controller Area Network (CAN) module
• Three SPI modules
• Three I2C modules. Support for up to 1 Mbit/s
• Six UART modules
• Secure Digital Host Controller (SDHC)
• I2S module
Timers
• Two 8-channel Flex-Timers (PWM/Motor control)
• Two 2-channel FlexTimers (PWM/Quad decoder)
• IEEE 1588 timers
• 32-bit PITs and 16-bit low-power timers
• Real-time clock
• Programmable delay block
Clocks
• 3 to 32 MHz and 32 kHz crystal oscillator
• PLL, FLL, and multiple internal oscillators
• 48 MHz Internal Reference Clock (IRC48M)
Operating Characteristics
• Voltage range: 1.71 to 3.6 V
• Flash write voltage range: 1.71 to 3.6 V
• Temperature range (ambient): –40 to 105°C
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
Ordering Information
1
Part Number
Flash
MK63FN1M0VLQ12
MK63FN1M0VMD12
1 MB
1 MB
Memory
SRAM (KB)
256
256
100
95
Maximum number of I\O's
1. To confirm current availability of ordererable part numbers, go to
http://www.nxp.com
and perform a part number search.
Related Resources
Type
Selector
Guide
Product Brief
Reference
Manual
Data Sheet
Package
drawing
Description
The NXP Solution Advisor is a web-based tool that features interactive
application wizards and a dynamic product selector.
The Product Brief contains concise overview/summary information to
enable quick evaluation of a device for design suitability.
The Reference Manual contains a comprehensive description of the
structure and function (operation) of a device.
The Data Sheet includes electrical characteristics and signal
connections.
Package dimensions are provided in package drawings.
Resource
Solution Advisor
K60PB
1
K63P144M120SF5RM
1
K63P144M120SF5
1
• LQFP 144-pin:
98ASS23177W
1
• MAPBGA 144-pin:
98ASA00222D
1
1. To find the associated resource, go to
http://www.nxp.com
and perform a search using this term.
2
NXP Semiconductors
Kinetis K63F Sub-Family Data Sheet, Rev. 7, 10/2016
Kinetis K63 Family
ARM
®
Cortex™-M4
Core
System
Internal
and external
watchdogs
Debug
interfaces
Interrupt
controller
DSP
Memory
protection
Memories and Memory Interfaces
Program
flash
Clocks
Phase-
locked loop
Frequency-
locked loop
Low/high
frequency
oscillators
RAM
Serial
programming
interface
External
bus
Floating-
point unit
DMA
Low-leakage
wakeup
Internal
reference
clocks
and Integrity
CRC
Random
number
generator
Hardware
encryption
Tamper
detect
Security
Analog
16-bit ADC
x2
Timers
Timers
x2 (8ch)
x2 (2ch)
Programmable
Communication Interfaces
I
C
x3
UART
x6
SPI
x3
CAN
x1
IEEE 1588
Ethernet
2
Human-Machine
Interface (HMI)
GPIO
I
S
2
Analog
comparator
x3
6-bit DAC
x3
12-bit DAC
x2
delay block
Secure
Digital
USB OTG
LS/FS
Periodic
interrupt
timers
Low power
timer
USB LS/FS
transceiver
USB charger
detect
USB voltage
regulator
Voltage
reference
Independent
real-time
clock
IEEE 1588
Timers
Figure 1. K63 block diagram
Kinetis K63F Sub-Family Data Sheet, Rev. 7, 10/2016
3
NXP Semiconductors
Table of Contents
1 Ratings.................................................................................... 5
1.1 Thermal handling ratings................................................. 5
1.2 Moisture handling ratings................................................ 5
1.3 ESD handling ratings....................................................... 5
1.4 Voltage and current operating ratings............................. 5
2 General................................................................................... 6
2.1 AC electrical characteristics.............................................6
2.2 Nonswitching electrical specifications..............................6
2.2.1
Voltage and current operating requirements.....6
2.2.2
LVD and POR operating requirements............. 8
2.2.3
Voltage and current operating behaviors.......... 8
2.2.4
Power mode transition operating behaviors......10
2.2.5
Power consumption operating behaviors.......... 10
2.2.6
EMC radiated emissions operating behaviors...16
2.2.7
Designing with radiated emissions in mind....... 17
2.2.8
Capacitance attributes...................................... 17
2.3 Switching specifications...................................................17
2.3.1
Device clock specifications............................... 17
2.3.2
General switching specifications....................... 18
2.4 Thermal specifications..................................................... 19
2.4.1
Thermal operating requirements....................... 19
2.4.2
Thermal attributes............................................. 20
3 Peripheral operating requirements and behaviors.................. 21
3.1 Core modules.................................................................. 21
3.1.1
Debug trace timing specifications..................... 21
3.1.2
JTAG electricals................................................ 22
3.2 System modules.............................................................. 25
3.3 Clock modules................................................................. 25
3.3.1
MCG specifications........................................... 25
3.3.2
IRC48M specifications...................................... 27
3.3.3
Oscillator electrical specifications..................... 28
3.3.4
32 kHz oscillator electrical characteristics.........30
3.4 Memories and memory interfaces................................... 31
3.4.1
3.4.2
3.4.3
Flash (FTFE) electrical specifications............... 31
EzPort switching specifications......................... 33
Flexbus switching specifications....................... 34
3.6.2
3.6.3
3.6.4
CMP and 6-bit DAC electrical specifications.....42
12-bit DAC electrical characteristics................. 44
Voltage reference electrical specifications........ 47
3.7 Timers..............................................................................48
3.8 Communication interfaces............................................... 48
3.8.1
Ethernet switching specifications...................... 49
3.8.2
3.8.3
3.8.4
3.8.5
3.8.6
3.8.7
USB electrical specifications............................. 51
USB DCD electrical specifications.................... 51
USB VREG electrical specifications..................52
CAN switching specifications............................ 52
DSPI switching specifications (limited voltage
range)................................................................53
DSPI switching specifications (full voltage
range)................................................................54
3.8.8
Inter-Integrated Circuit Interface (I2C) timing....56
3.8.9
UART switching specifications.......................... 58
3.8.10 SDHC specifications......................................... 58
3.8.11 I2S switching specifications.............................. 59
4 Dimensions............................................................................. 65
4.1 Obtaining package dimensions....................................... 65
5 Pinout...................................................................................... 65
5.1 K63 Signal Multiplexing and Pin Assignments.................65
5.2 Unused analog interfaces................................................ 72
5.3 K63 Pinouts..................................................................... 72
6 Ordering parts......................................................................... 74
6.1 Determining valid orderable parts....................................74
7 Part identification.....................................................................75
7.1 Description.......................................................................75
7.2 Format............................................................................. 75
7.3 Fields............................................................................... 75
7.4 Example...........................................................................76
8 Terminology and guidelines.................................................... 76
8.1 Definitions........................................................................ 76
8.2 Examples......................................................................... 77
8.3 Typical-value conditions.................................................. 77
8.4 Relationship between ratings and operating
requirements....................................................................78
8.5 Guidelines for ratings and operating requirements..........78
9 Revision History...................................................................... 79
3.5 Security and integrity modules........................................ 37
3.5.1
DryIce Tamper Electrical Specifications............37
3.6 Analog............................................................................. 38
3.6.1
ADC electrical specifications.............................38
4
NXP Semiconductors
Kinetis K63F Sub-Family Data Sheet, Rev. 7, 10/2016
Ratings
1 Ratings
1.1 Thermal handling ratings
Symbol
T
STG
T
SDR
Description
Storage temperature
Solder temperature, lead-free
Solder temperature, leaded
Min.
–55
—
—
Max.
150
260
245
Unit
°C
°C
Notes
1
2
1. Determined according to JEDEC Standard JESD22-A103,
High Temperature Storage Life.
2. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.2 Moisture handling ratings
Symbol
MSL
Description
Moisture sensitivity level
Min.
—
Max.
3
Unit
—
Notes
1
1. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.3 ESD handling ratings
Symbol
V
HBM
V
CDM
I
LAT
Description
Electrostatic discharge voltage, human body model
Electrostatic discharge voltage, charged-device
model
Latch-up current at ambient temperature of 105°C
Min.
-2000
-500
-100
Max.
+2000
+500
+100
Unit
V
V
mA
Notes
1
2
3
1. Determined according to JEDEC Standard JESD22-A114,
Electrostatic Discharge (ESD) Sensitivity Testing Human
Body Model (HBM).
2. Determined according to JEDEC Standard JESD22-C101,
Field-Induced Charged-Device Model Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components.
3. Determined according to JEDEC Standard JESD78,
IC Latch-Up Test.
1.4 Voltage and current operating ratings
Kinetis K63F Sub-Family Data Sheet, Rev. 7, 10/2016
5
NXP Semiconductors
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