Lead Temperature (soldering, 10s) ................................+ 300°C
Soldering Temperature (reflow) ......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
TDFN
Junction-to-Ambient Thermal Resistance (θ
JA
) .......83.9°C/W
Junction-to-Ambient Thermal Resistance (θ
JC
) .......37.0°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
DD
= 1.7V to 5.5V, V
H
= V
DD
, V
L
= GND, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 1.8V,
T
A
= +25°C.) (Note 2)
PARAMETER
RESOLUTION
256-Tap Family
Integral Nonlinearity (Note 3)
Differential Nonlinearity
Ratiometric Resistor Tempco
N
INL
DNL
(Note 3)
(DV
W
/V
W
)/DT, V
H
= V
DD
, V
L
= GND, No
Load
Charge pump enabled, 1.7V < V
DD
< 5.5V
Full-Scale Error (Code FFh)
Charge pump disabled,
2.6V < V
DD
< 5.5V
MAX5395M
MAX5395N
MAX5395L
MAX5395M
MAX5395N
MAX5395L
-1.0
-1.0
-1.5
-0.5
25
-0.5
-0.5
-1.0
+0.5
+0.5
+1.0
+1.0
+1.0
+1.5
+0.5
50
200
LSB
Ω
LSB
LSB
LSB
256
-1.0
-0.5
5
+1.0
+0.5
Tap
LSB
LSB
ppm/°C
DC PERFORMANCE (Voltage-Divider Mode)
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Charge pump enabled, 1.7V < V
DD
< 5.5V
Zero-Scale Error (Code 00h)
Charge pump disabled,
2.6V < V
DD
< 5.5V
DC PERFORMANCE (Variable Resistor Mode)
Charge pump enabled, 1.7V < V
DD
< 5.5V
Integral Nonlinearity (Note 4)
R-INL
Charge pump disabled,
2.6V < V
DD
< 5.5V
(Note 4)
Charge pump enabled, 1.7V < V
DD
< 5.5V
Charge pump disabled, 2.6V < V
DD
< 5.5V
MAX5395M
MAX5395N
MAX5395L
Differential Nonlinearity
Wiper Resistance (Note 5)
R-DNL
R
WL
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Maxim Integrated
│
2
MAX5395
Single, 256-Tap Volatile, I
2
C, Low-Voltage Linear
Taper Digital Potentiometer
Electrical Characteristics (continued)
(V
DD
= 1.7V to 5.5V, V
H
= V
DD
, V
L
= GND, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 1.8V,
T
A
= +25°C.) (Note 2)
PARAMETER
Terminal Capacitance
Wiper Capacitance
End-to-End Resistor Tempco
End-to-End Resistor Tolerance
AC PERFORMANCE
-3dB Bandwidth
Total Harmonic Distortion Plus
Noise
Wiper Settling Time
Charge-Pump Feedthrough at W
POWER SUPPLIES
Supply Voltage Range
Terminal Voltage Range
(H, W, L to GND)
V
DD
Charge pump enabled, 1.7V < V
DD
< 5.5V
Charge pump disabled, 2.6V < V
DD
< 5.5V
Charge pump disabled, 1.7V
Charge pump disabled, 2.5V
Supply Current (Note 8)
I
VDD
Charge pump disabled, 5.5V
Charge pump enabled,
1.7V < V
DD
< 5.5V
DIGITAL INPUTS
Minimum Input High Voltage
Maximum Input Low Voltage
Input Leakage Current
Input Capacitance
ADDR0 Pullup/Pulldown Strength
Maximum SCL Frequency
Setup Time for START Condition
R
PUR
R
PD
f
SCL
t
SU:STA
0.6
(Note 9)
TIMING CHARACTERISTICS (Note 10)
400
kHz
µs
V
IH
V
IL
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
-1
5
60
70
80
30
20
+1
%x
V
DD
%x
V
DD
µA
pF
kΩ
V
DD
= 5.5V
V
DD
= 1.7V
1.7
0
0
0.3
0.4
1.0
25
20
5.5
5.25
V
DD
1.4
1.7
4.0
50
45
µA
V
V
BW
THD+N
t
S
V
RW
Code = 80h, 10pF load,
V
DD
= 1.8V
(Note 6)
(Note 7)
10kΩ
50kΩ
100kΩ
SYMBOL
C
H
, C
L
C
W
T
CR
CONDITIONS
Measured to GND
Measured to GND
No load
Wiper not connected
10kΩ
50kΩ
100kΩ
-25
1600
340
165
0.035
190
400
664
600
MIN
TYP
10
20
50
+25
MAX
UNITS
pF
pF
ppm/°C
%
DC PERFORMANCE (Resistor Characteristics)
kHz
%
ns
nV
RMS
www.maximintegrated.com
Maxim Integrated
│
3
MAX5395
Single, 256-Tap Volatile, I
2
C, Low-Voltage Linear
Taper Digital Potentiometer
Electrical Characteristics (continued)
(V
DD
= 1.7V to 5.5V, V
H
= V
DD
, V
L
= GND, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 1.8V,
T
A
= +25°C.) (Note 2)
PARAMETER
Hold Time for START Condition
SCL High Time
SCL Low Time
Data Setup Time
Data Hold Time
SDA, SCL Rise Time
SDA, SCL Fall Time
Setup Time for STOP Conditions
Bus Free Time Between STOP
and START Conditions
Pulse-Suppressed Spike Width
Capacitive Load for Each Bus
Note 2:
Note
Note
SYMBOL
t
HD:STA
t
HIGH
t
LOW
t
SU:DAT
t
HD:DAT
t
R
t
F
t
SU:STO
t
BUF
t
SP
C
B
0.6
1.3
50
400
CONDITIONS
MIN
0.6
0.6
1.3
100
0
0.3
0.3
TYP
MAX
UNITS
µs
µs
µs
ns
µs
µs
µs
µs
µs
ns
pF
Note
Note
Note
Note
Note
Note
All devices are production tested at T
A
= +25°C and are guaranteed by design and characterization for T
A
= -40°C to
+125°C.
3:
DNL and INL are measured with the potentiometer configured as a voltage-divider with V
H
= 5.25V (QP enabled) or V
DD
(QP disabled) and V
L
= GND. The wiper terminal is unloaded and measured with an ideal voltmeter.
4:
R-DNL and R-INL are measured with the potentiometer configured as a variable resistor (Figure
1).
H is unconnected and
L = GND.
For charge pump enabled, V
DD
= 1.7V to 5.5V, the wiper terminal is driven with a source current of 400μA for the 10kΩ
configuration, 80μA for the 50kΩ configuration, and 40μA for the 100kΩ configuration.
For charge pump disabled and V
DD
= 5.5V, the wiper terminal is driven with a source current of 400μA for the 10kΩ
configuration, 80μA for the 50kΩ configuration, and 40μA for the 100kΩ configuration.
For charge pump disabled and V
DD
= 2.6V, the wiper terminal is driven with a source current of 200μA for the 10kΩ
configuration, 40μA for the 50kΩ configuration, and 20μA for the 100kΩ configuration.
5:
The wiper resistance is the maximum value measured by injecting the currents given in Note 4 into W with L = GND.
R
W
= (V
W
- V
H
)/I
W
.
6:
Measured at W with H driven with a 1kHz, 0V to V
DD
amplitude tone and V
L
= GND. Wiper at midscale with a 10pF load.
7:
Wiper-settling time is the worst-case 0-to-50% rise time, measured between tap 0 and tap 127. H = V
DD
, L = GND, and
the wiper terminal is loaded with 10pF capacitance to ground.
8:
Digital Inputs at V
DD
or GND.
9:
An unconnected condition on the ADDR0 pin is sensed via a pullup and pulldown operation. For proper operation, the
ADDR0 pin should be tied to V
DD
, GND, or left unconnected with minimal capacitance.
10:
Digital timing is guaranteed by design and characterization, and is not production tested.
H
N.C.
W
W
L
L
Figure 1. Voltage-Divider and Variable Resistor Configurations
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