TSM3N80
Taiwan Semiconductor
N-Channel Power MOSFET
800V, 3A, 4.2Ω
FEATURES
●
●
●
●
Low R
DS(ON)
3.3Ω (Typ.)
Low gate charge typical @ 19nC (Typ.)
Low Crss typical @ 10.2pF (Typ.)
Improved dv/dt capability
KEY PERFORMANCE PARAMETERS
PARAMETER
V
DS
R
DS(on)
(max)
Q
g
VALUE
800
4.2
19
UNIT
V
Ω
nC
APPLICATION
●
●
Power Supply
Lighting
TO-220
ITO-220
TO-251(IPAK)
TO-252(DPAK)
Notes:
MSL 3 (Moisture Sensitivity Level) for TO-252 (D-PAK) per J-STD-020
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
(Note 1)
SYMBOL
V
DS
V
GS
T
C
= 25°C
T
C
= 100°C
(Note 3)
(Note 3)
LIMIT
IPAK/DPAK
ITO-220
TO-220
UNIT
V
V
A
A
mJ
A
mJ
V/ns
800
±30
3
1.83
12
48
3
I
D
I
DM
E
AS
I
AS
E
AR
dV/dt
P
DTOT
T
J
, T
STG
94
(Note 2)
Single Pulsed Avalanche Energy
Single Pulsed Avalanche Current
Repetitive Avalanche Energy
Repetitive Avalanche Energy
(Note 3)
9.4
4.5
32
- 55 to +150
94
(Note 4)
Total Power Dissipation @ T
C
= 25°C
Operating Junction and Storage Temperature Range
W
°C
THERMAL PERFORMANCE
PARAMETER
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance
SYMBOL
R
ӨJc
R
ӨJA
LIMIT
IPAK/DPAK
ITO-220
TO-220
UNIT
°C/W
°C/W
1.33
110
3.9
62.5
1.33
Notes:
R
ӨJA
is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. R
ӨJA
is guaranteed by design while R
ӨCA
is determined by the user’s board
design. R
ӨJA
shown below for single device operation on FR-4 PCB in still air
Document Number: DS_P0000084
1
Version: F1706
TSM3N80
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Static
(Note 5)
CONDITIONS
V
GS
= 0V, I
D
= 250µA
V
DS
= V
GS
, I
D
= 250µA
V
GS
= ±30V, V
DS
= 0V
V
DS
= 800V, V
GS
= 0V
V
GS
= 10V, I
D
= 1.5A
V
DS
= 30V, I
D
= 1.5A
SYMBOL
BV
DSS
V
GS(TH)
I
GSS
I
DSS
R
DS(ON)
g
fs
Q
g
MIN
TYP
MAX
UNIT
V
V
nA
μA
Ω
S
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transfer Conductance
Dynamic
(Note 6)
800
2
--
--
--
--
--
--
--
--
3.3
3.7
--
4
±100
10
4.2
--
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Switching
(Note 7)
--
--
--
--
--
--
--
19
4
7.6
696
65
10.2
3.2
--
--
--
--
--
--
--
Ω
pF
nC
V
DS
= 640V, I
D
= 3A,
V
GS
= 10V
Q
gs
Q
gd
C
iss
V
DS
= 25V, V
GS
= 0V,
f = 1.0MHz
F = 1MHz, open drain
C
oss
C
rss
R
g
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Source-Drain Diode
Source Current
Source Current (Pulse)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Notes:
1.
2.
3.
4.
5.
6.
7.
Current limited by package
Pulse width limited by the maximum junction temperature
L = 10mH, I
AS
= 3A, V
DD
= 50V, R
G
= 25Ω, Starting T
J
= 25 C
I
SD
≤ 3A, dI/dt ≤ 200A/uS, V
DD
≤ BV
DSS
, Starting T
J
= 25ºC
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
For DESIGN AID ONLY, not subject to production testing.
Switching time is essentially independent of operating temperature.
o
t
d(on)
V
GS
= 10V, I
D
= 3A,
V
DD
= 400V, R
G
=25Ω
(Note 5)
--
--
--
--
48
36
106
41
--
--
--
--
ns
t
r
t
d(off)
t
f
Integral reverse diode
in the MOSFET
I
S
= 3A, V
GS
= 0V
V
GS
= 0V, I
S
=3A,
dI
F
/dt = 100A/us
I
S
I
SM
V
SD
t
rr
Q
rr
--
--
--
--
--
--
--
--
370
1.8
3
12
1.5
--
--
A
A
V
ns
μC
Document Number: DS_P0000084
2
Version: F1706
TSM3N80
Taiwan Semiconductor
ORDERING INFORMATION
PART NO.
TSM3N80CZ C0G
TSM3N80CI C0G
TSM3N80CH C5G
TSM3N80CP ROG
PACKAGE
TO-220
ITO-220
TO-251 (IPAK)
TO-252 (DPAK)
PACKING
50pcs / Tube
50pcs / Tube
75pcs / Tube
2,500pcs / 13” Reel
Note:
1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
2. Halogen-free according to IEC 61249-2-21 definition
Document Number: DS_P0000084
3
Version: F1706
TSM3N80
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Drain Current
Gate Charge
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
Document Number: DS_P0000084
4
Version: F1706
TSM3N80
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Drain Current vs. Case Temperature
BV
DSS
vs. Junction Temperature
Maximum Safe Operating Area(TO-220, I/D-PAK)
Capacitance vs. Drain-Source Voltage
Maximum Safe Operating Area(ITO-220)
Document Number: DS_P0000084
5
Version: F1706
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