74ABT623
Octal transceiver with dual enable; non-inverting; 3-state
Rev. 03 — 22 October 2009
Product data sheet
1. General description
The 74ABT623 high performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive.
The 74ABT623 is an octal transceiver featuring non-inverting 3-state bus compatible
outputs in both send and receive directions. This octal bus transceiver is designed for
asynchronous two-way communication between data buses.
The control function implementation allows maximum flexibility in timing. This device
allows data transmission from the A bus to the B bus or from the B bus to the A bus,
depending upon the logic levels at the enable inputs (pins OEAB and OEBA). The enable
inputs can be used to disable the device so that the buses are effectively isolated. The
dual enable function configuration gives this transceiver the capability to store data by
simultaneous enabling of pins OEAB and OEBA. Each output reinforces its input in this
transceiver configuration. Thus, when both control inputs are enabled and all other data
sources to the two sets of the bus lines are at high-impedance OFF-state, both sets of the
bus lines will remain at their last states. The 8-bit codes appearing on the two sets of
buses will be identical.
2. Features
I
I
I
I
I
I
I
Octal bidirectional bus interface
3-state buffers
Power-up 3-state
Output capability: +64 mA and
−32
mA
data inputs are disabled during 3-state mode
Latch-up protection exceeds 500 mA per JESD78B class II level A
ESD protection:
N
HBM JESD22-A114F exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
NXP Semiconductors
74ABT623
Octal transceiver with dual enable; non-inverting; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74ABT623D
74ABT623DB
74ABT623PW
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
SO20
SSOP20
TSSOP20
Description
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT339-1
SOT360-1
plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
Type number
4. Functional diagram
19
1
EN1
EN2
1
1
2
3
4
5
6
7
8
9
2
B0
B1
B2
B3
B4
B5
B6
B7
OEBA
9
19
001aaa844
001aaa833
OEAB
A0
A1
A2
A3
A4
A5
A6
A7
18
17
16
15
5
14
13
12
11
6
7
8
3
4
2
18
17
16
15
14
13
12
11
Fig 1.
Logic symbol.
Fig 2.
IEC logic symbol.
74ABT623_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 October 2009
2 of 15
NXP Semiconductors
74ABT623
Octal transceiver with dual enable; non-inverting; 3-state
19
OEBA
1
2
OEAB
A0
B0
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
001aaa832
Fig 3.
Logic diagram
74ABT623_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 October 2009
3 of 15
NXP Semiconductors
74ABT623
Octal transceiver with dual enable; non-inverting; 3-state
5. Pinning information
5.1 Pinning
74ABT623
OEAB
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
20 V
CC
19 OEBA
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
001aak828
74ABT623
OEAB
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
20 V
CC
19 OEBA
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
001aak829
GND 10
GND 10
Fig 4.
Pin configuration SO20
Fig 5.
Pin configuration (T)SSOP20
5.2 Pin description
Table 2.
Symbol
OEAB
A0 to A7
B0 to B7
GND
OEBA
V
CC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
18, 17, 16, 15, 14, 13, 12, 11
10
19
20
Description
output enable input (active HIGH)
data input or output
data input or output
ground (0 V)
output enable input (active LOW)
supply voltage
6. Functional description
Table 3.
Input
OEAB
L
H
L
H
H
[1]
Function table
[1]
Input or output
OEBA
L
H
H
L
L
An
An = Bn
input
Z
An = Bn
input
Bn
input
Bn = An
Z
input
Bn = An
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
74ABT623_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 October 2009
4 of 15
NXP Semiconductors
74ABT623
Octal transceiver with dual enable; non-inverting; 3-state
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
j
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input voltage
output voltage
input diode current
output diode current
output current
junction temperature
storage temperature
total power dissipation
Conditions
[1]
Min
−0.5
−1.2
−0.5
−18
−50
-
[2]
Max
+7.0
+7.0
+5.5
-
-
128
150
+150
500
Unit
V
V
V
mA
mA
mA
°C
°C
mW
output in OFF-state or
HIGH-state
V
I
< 0 V
V
O
< 0 V
output in LOW-state
[1]
-
−65
-
T
amb
=
−40 °C
to +85
°C
[3]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
For SO20 package: P
tot
derates linearly with 8 mW/K above 70
°C.
For SSOP20 and TSSOP20 package: P
tot
derates linearly with 5.5 mW/K above 60
°C.
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆V
T
amb
Recommended operating conditions
Parameter
supply voltage
input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
input transition rise or fall rate
ambient temperature
in free air
Conditions
Min
4.5
0
2.0
-
−32
-
0
−40
Typ
-
-
-
-
-
-
-
-
Max
5.5
V
CC
-
0.8
-
64
10
+85
Unit
V
V
V
V
mA
mA
ns/V
°C
74ABT623_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 October 2009
5 of 15
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