74VHC4066 — Quad Analog Switch
December 2007
74VHC4066
Quad Analog Switch
Features
■
Typical switch enable time: 15ns
■
Wide analog input voltage range: 0–12V
■
Low “ON” resistance: 30 Typ. ('4066)
■
Low quiescent current: 80µA maximum (74VHC)
■
Matched switch characteristics
■
Individual switch controls
■
Pin and function compatible with the 74HC4066
General Description
These devices are digitally controlled analog switches
utilizing advanced silicon-gate CMOS technology. These
switches have low “ON” resistance and low “OFF” leak-
ages. They are bidirectional switches, thus any analog
input may be used as an output and visa-versa. Also the
4066 switches contain linearization circuitry which low-
ers the “ON” resistance and increases switch linearity.
The 4066 devices allow control of up to 12V (peak) ana-
log signals with digital control signals of the same range.
Each switch has its own control input which disables
each switch when low. All analog inputs and outputs and
digital inputs are protected from electrostatic damage by
diodes to V
CC
and ground.
Ordering Information
Order Number
74VHC4066M
74VHC4066MTC
Package
Number
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012,
0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1994 Fairchild Semiconductor Corporation
74VHC4066 Rev. 1.5.0
www.fairchildsemi.com
74VHC4066 — Quad Analog Switch
Connection Diagram
Truth Table
Input
CTL
L
H
Switch
I/O–O/I
“OFF”
“ON”
Top View
Schematic Diagram
©1994 Fairchild Semiconductor Corporation
74VHC4066 Rev. 1.5.0
www.fairchildsemi.com
2
74VHC4066 — Quad Analog Switch
Absolute Maximum Ratings
(1)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
IO
I
IK
, I
OK
I
OUT
I
CC
T
STG
P
D
T
L
Supply Voltage
DC Control Input Voltage
DC Switch I/O Voltage
Clamp Diode Current
DC Output Current, per pin
Parameter
Rating
–0.5 to +15V
–1.5 to V
CC
+1.5V
V
EE
–0.5 to V
CC
+0.5V
±20mA
±25mA
±50mA
–65°C to +150°C
600mW
500mW
260°C
DC V
CC
or GND Current, per pin
Storage Temperature Range
Power Dissipation
S.O. Package only
Lead Temperature (Soldering 10 seconds)
Note:
1. Unless otherwise specified all voltages are referenced to ground.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
, V
OUT
T
A
t
r
, t
f
Supply Voltage
Parameter
Min.
2
0
–40
Max.
12
V
CC
+85
Units
V
V
°C
DC Input or Output Voltage
Operating Temperature Range
Input Rise or Fall Times
V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
9.0V
1000
500
400
ns
©1994 Fairchild Semiconductor Corporation
74VHC4066 Rev. 1.5.0
www.fairchildsemi.com
3
74VHC4066 — Quad Analog Switch
DC Electrical Characteristics
(2)
T
A
=
25°C
Symbol
V
IH
T
A
=
–40°C
to 85°C
Units
V
Parameter
Minimum HIGH Level
Input Voltage
Conditions
V
CC
2.0V
4.5V
9.0V
12.0V
Typ
Guaranteed
Limits
1.5
3.15
6.3
8.4
0.5
1.35
2.7
3.6
1.5
3.15
5.3
8.4
0.5
1.35
2.7
3.6
200
105
85
215
100
75
60
20
15
15
±0.5
±600
±800
±1000
±150
±200
±300
10
20
40
V
IL
Maximum LOW Level
Input Voltage
2.0V
4.5V
9.0V
12.0V
V
R
ON
Maximum “ON”
Resistance
(3)
V
CTL
=
V
IH
, I
S
=
2.0mA,
V
IS
=
V
CC
to GND (Fig. 1)
V
CTL
=
V
IH
, I
S
=
2.0mA,
V
IS
=
V
CC
or GND (Fig. 1)
4.5V
9.0V
12.0V
2.0V
4.5V
9.0V
12.0V
100
50
30
120
50
35
20
10
5
5
170
85
70
180
80
60
40
15
10
10
±0.05
Ω
R
ON
Maximum “ON”
Resistance Matching
V
CTL
=
V
IH
,
V
IS
=
V
CC
to GND
4.5V
9.0V
12.0V
Ω
I
IN
I
IZ
Maximum Control Input V
IN
=
V
CC
or GND,
Current
V
CC
=
2 – 6V
Maximum Switch “OFF” V
OS
=
V
CC
or GND,
Leakage Current
V
IS
=
GND or V
CC
,
V
CTL
=
V
IL
(Fig. 2)
Maximum Switch “ON”
Leakage Current
V
IS
=
V
CC
to GND,
V
CTL
=
V
IH
, V
OS
=
OPEN
(Fig. 3)
V
IN
=
V
CC
or GND,
I
OUT
=
0µA
6.0V
9.0V
12.0V
6.0V
9.0V
12.0V
6.0V
9.0V
12.0V
10
15
20
10
15
20
µA
nA
±60
±80
±100
±40
±50
±60
1.0
2.0
4.0
I
IZ
nA
I
CC
Maximum Quiescent
Supply Current
µA
Notes:
2. For a power supply of 5V ± 10% the worst case on resistance (R
ON
) occurs for VHC at 4.5V. Thus the 4.5V values
should be used when designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively.
(The V
IH
value at 5.5V is 3.85V.) The worst case leakage current occurs for CMOS at the higher voltage and so the
5.5V values should be used.
3. At supply voltages (V
CC
– GND) approaching 2V the analog switch on resistance becomes extremely non-linear.
Therefore it is recommended that these devices be used to transmit digital only when using these supply voltages.
©1994 Fairchild Semiconductor Corporation
74VHC4066 Rev. 1.5.0
www.fairchildsemi.com
4
74VHC4066 — Quad Analog Switch
AC Electrical Characteristics
V
CC
=
2.0V–6.0V V
EE
=
0V–12V, C
L
=
50pF (unless otherwise specified)
T
A
=
25°C
Symbol
t
PHL
, t
PLH
T
A
=
–40°C
to 85°C
Units
ns
Parameter
Maximum Propagation Delay
Switch In to Out
Conditions
V
CC
3.3V
4.5V
9.0V
12.0V
Typ.
25
5
4
3
30
12
6
5
60
25
20
15
40
100
–52
–50
100
250
–42
–44
Guaranteed
Limits
30
10
8
7
58
20
12
10
100
36
32
30
20
13
10
11
73
25
15
13
125
45
40
38
t
PZL
, t
PZH
Maximum Switch Turn “ON”
Delay
R
L
=
1kΩ
3.3V
4.5V
9.0V
12.0V
ns
t
PHZ
, t
PLZ
Maximum Switch Turn “OFF”
Delay
R
L
=
1kΩ
3.3V
4.5V
9.0V
12.0V
ns
Minimum Frequency
Response (Fig. 7)
20 log (V
O
/V
I
)
=
–3dB
Crosstalk Between any Two
Switches (Fig. 8)
Peak Control to Switch
Feedthrough Noise (Fig. 9)
Switch OFF Signal
Feedthrough Isolation
(Fig. 10)
THD
Total Harmonic Distortion
(Fig. 11)
R
L
=
600Ω,
V
IS
=
2 V
PP
at (V
CC
/ 2)
(4)(5)
R
L
=
600Ω, F
=
1MHz
(5)(6)
R
L
=
600Ω, F
=
1 MHz,
C
L
=
50 pF
R
L
=
600Ω, F
=
1 MHz,
V
(CT)
V
IL(5)(6)
R
L
=
10 kΩ, C
L
=
50pF,
F
=
1kHz
V
IS
=
4 V
PP
V
IS
=
8 V
PP
4.5V
9.0V
4.5V
9.0V
4.5V
9.0V
4.5V
9.0V
MHz
dB
mV
dB
4.5V
9.0V
.013
.008
5
20
10
10
%
pF
pF
pF
pF
C
IN
C
IN
C
IN
C
PD
Maximum Control Input
Capacitance
Maximum Switch Input
Capacitance
Maximum Feedthrough
Capacitance
Power Dissipation
Capacitance
V
CTL
=
GND
0.5
15
Notes:
4. Adjust 0dBm for F
=
1kHz (Null R
L
/ R
ON
Attenuation).
5. V
IS
is centered at V
CC
/ 2.
6. Adjust input for 0dBm.
©1994 Fairchild Semiconductor Corporation
74VHC4066 Rev. 1.5.0
www.fairchildsemi.com
5
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