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74AUP1G17GW-G

产品描述Buffers u0026 Line Drivers 1.8V SINGLE SCHMITT TRIG BUF
产品类别半导体    逻辑   
文件大小238KB,共24页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
下载文档 详细参数 选型对比 全文预览

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74AUP1G17GW-G概述

Buffers u0026 Line Drivers 1.8V SINGLE SCHMITT TRIG BUF

74AUP1G17GW-G规格参数

参数名称属性值
产品种类
Product Category
Buffers & Line Drivers
制造商
Manufacturer
NXP(恩智浦)
RoHSDetails
Number of Input Lines1 Input
Number of Output Lines1 Output
PolarityNon-Inverting
电源电压-最大
Supply Voltage - Max
3.6 V
电源电压-最小
Supply Voltage - Min
0.8 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
SOT-353-5
系列
Packaging
Reel
High Level Output Current- 4 mA
Logic FamilyAUP
Logic TypeCMOS
Low Level Output Current4 mA
Number of Channels1 Channel
工作电源电压
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
传播延迟时间
Propagation Delay Time
19 ns at 1.1 V to 1.3 V
工厂包装数量
Factory Pack Quantity
3000
单位重量
Unit Weight
0.000212 oz

文档预览

下载PDF文档
74AUP1G17
Low-power Schmitt trigger
Rev. 8 — 15 January 2015
Product data sheet
1. General description
The 74AUP1G17 provides the single Schmitt trigger buffer. It is capable of transforming
slowly changing input signals into sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T
is defined as the input
hysteresis voltage V
H
.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

74AUP1G17GW-G相似产品对比

74AUP1G17GW-G 74AUP1G175GW125 74AUP1G175GM132
描述 Buffers u0026 Line Drivers 1.8V SINGLE SCHMITT TRIG BUF Switching Voltage Regulators Flip Flops Flip Flop D-Type Pos-Edge 1-Elem 6Pin
产品种类
Product Category
Buffers & Line Drivers Flip Flops Flip Flops
制造商
Manufacturer
NXP(恩智浦) NXP(恩智浦) NXP(恩智浦)
RoHS Details Details Details
工厂包装数量
Factory Pack Quantity
3000 3000 5000
Number of Input Lines 1 Input 1 -
Number of Output Lines 1 Output 1 -
Polarity Non-Inverting Non-Inverting -
电源电压-最大
Supply Voltage - Max
3.6 V 3.6 V -
电源电压-最小
Supply Voltage - Min
0.8 V 0.8 V -
最小工作温度
Minimum Operating Temperature
- 40 C - 40 C -
最大工作温度
Maximum Operating Temperature
+ 125 C + 125 C -
安装风格
Mounting Style
SMD/SMT SMD/SMT -
封装 / 箱体
Package / Case
SOT-353-5 SOT-363 -
系列
Packaging
Reel Cut Tape Reel
High Level Output Current - 4 mA - 4 mA -
Logic Family AUP AUP -
Logic Type CMOS CMOS -
Low Level Output Current 4 mA 4 mA -
Number of Channels 1 Channel 1 Channel -
工作电源电压
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V 1.8 V, 2.5 V, 3.3 V -
传播延迟时间
Propagation Delay Time
19 ns at 1.1 V to 1.3 V 19.5 ns -
单位重量
Unit Weight
0.000212 oz 0.000212 oz -

 
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