74ALVT16374
16-bit edge-triggered D-type flip-flop; 3-state
Rev. 04 — 4 July 2005
Product data sheet
1. General description
The 74ALVT16374 is a high performance BiCMOS product designed for V
CC
operation at
2.5 V or 3.3 V with I/O compatibility up to 5 V.
This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-state
outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the
positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels
set up at the D inputs.
2. Features
s
s
s
s
s
s
s
s
s
s
s
s
s
16-bit edge-triggered flip-flop
5 V I/O compatible
3-state buffers
Output capability: +64 mA and
−32
mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Power-up reset
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection exceeds 500 mA per JESD78
Electrostatic discharge protection:
x
MIL STD 883 method 3015: exceeds 2000 V
x
Machine model: exceeds 200 V
Philips Semiconductors
74ALVT16374
16-bit edge-triggered D-type flip-flop; 3-state
3. Quick reference data
Table 1:
Quick reference data
T
amb
= 25
°
C.
Symbol
t
PLH
t
PHL
C
i
C
o
I
CC
t
PLH
t
PHL
C
i
C
o
I
CC
Parameter
propagation delay nCP to nQx
propagation delay nCP to nQx
output capacitance
supply current
propagation delay nCP to nQx
propagation delay nCP to nQx
output capacitance
supply current
Conditions
C
L
= 50 pF
C
L
= 50 pF
outputs disabled;
V
O
= 0 V or V
CC
outputs disabled
C
L
= 50 pF
C
L
= 50 pF
outputs disabled;
V
O
= 0 V or V
CC
outputs disabled
Min
-
-
-
-
-
-
-
-
-
-
Typ
2.6
2.8
3
9
40
2.1
2.3
3
9
40
Max
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
pF
pF
µA
ns
ns
pF
pF
µA
V
CC
= 2.5 V
input capacitance nCP and nOE V
I
= 0 V or V
CC
V
CC
= 3.3 V
input capacitance nCP and nOE V
I
= 0 V or V
CC
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74ALVT16374DGG
−40 °C
to +85
°C
74ALVT16374DL
−40 °C
to +85
°C
TSSOP48
SSOP48
Description
plastic thin shrink small outline package; 48 leads;
body width 6.1 mm
Version
SOT362-1
Type number
plastic shrink small outline package; 48 leads; body SOT370-1
width 7.5 mm
9397 750 15193
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2005
2 of 18
Philips Semiconductors
74ALVT16374
16-bit edge-triggered D-type flip-flop; 3-state
5. Functional diagram
1
1OE
48
1CP
24
2OE
25
2CP
1D0
1D1
1D2
1D3
1D4
1D5
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
001aaa254
EN1
C3
EN2
C4
3D
1
2
3
5
6
8
9
11
12
4D
2
13
14
16
17
19
20
22
23
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
47
46
44
43
41
40
38
37
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7
48
1
1CP
1OE
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
2
36
3
35
5
33
6
32
8
30
9
29
11
27
12
26
1D6
1D7
2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7
25
24
2CP
2OE
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
13
14
16
17
19
20
22
23
001aad246
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
Fig 1. Logic symbol
Fig 2. IEC logic symbol
nD0
D
nD1
D
nD2
D
nD3
D
nD4
D
nD5
D
nD6
D
nD7
D
CP
nCP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
nOE
nQ0
nQ1
nQ2
nQ3
nQ4
nQ5
nQ6
nQ7
001aac371
Fig 3. Logic diagram
9397 750 15193
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2005
3 of 18
Philips Semiconductors
74ALVT16374
16-bit edge-triggered D-type flip-flop; 3-state
6. Pinning information
6.1 Pinning
1OE
1Q0
1Q1
GND
1Q2
1Q3
V
CC
1Q4
1Q5
1
2
3
4
5
6
7
8
9
48 1CP
47 1D0
46 1D1
45 GND
44 1D2
43 1D3
42 V
CC
41 1D4
40 1D5
39 GND
38 1D6
37 1D7
36 2D0
35 2D1
34 GND
33 2D2
32 2D3
31 V
CC
30 2D4
29 2D5
28 GND
27 2D6
26 2D7
25 2CP
001aad248
GND 10
1Q6 11
1Q7 12
2Q0 13
2Q1 14
GND 15
2Q2 16
2Q3 17
V
CC
18
2Q4 19
2Q5 20
GND 21
2Q6 22
2Q7 23
2OE 24
16374
Fig 4. Pin configuration
6.2 Pin description
Table 3:
Symbol
1OE
1Q0
1Q1
GND
1Q2
1Q3
V
CC
1Q4
1Q5
GND
1Q6
9397 750 15193
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
Description
output enable input (active LOW)
data output
data output
ground (0 V)
data output
data output
supply voltage
data output
data output
ground (0 V)
data output
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2005
4 of 18
Philips Semiconductors
74ALVT16374
16-bit edge-triggered D-type flip-flop; 3-state
Pin description
Pin
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Description
data output
data output
data output
ground (0 V)
data output
data output
supply voltage
data output
data output
ground (0 V)
data output
data output
output enable input (active LOW)
clock pulse input (active rising edge)
data input
data input
ground (0 V)
data input
data input
supply voltage
data input
data input
ground (0 V)
data input
data input
data input
data input
ground (0 V)
data input
data input
supply voltage
data input
data input
ground (0 V)
data input
data input
clock pulse input (active rising edge)
Table 3:
Symbol
1Q7
2Q0
2Q1
GND
2Q2
2Q3
V
CC
2Q4
2Q5
GND
2Q6
2Q7
2OE
2CP
2D7
2D6
GND
2D5
2D4
V
CC
2D3
2D2
GND
2D1
2D0
1D7
1D6
GND
1D5
1D4
V
CC
1D3
1D2
GND
1D1
1D0
1CP
9397 750 15193
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2005
5 of 18
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