EVALUATION KIT AVAILABLE
MAX5717/MAX5719
16 and 20-Bit Voltage DACs
General Description
The MAX5717 and MAX5719 are serial-input, unbuffered
16 and 20-bit voltage-output unipolar digital-to-analog
converters (DACs) with integrated feedback resistors
that allow bipolar operation when used with an external
operational amplifier. These DACs provide low glitch
energy, low noise, tight bipolar resistor matching, and high
accuracy. The DACs feature 1LSB INL (max, MAX5717A)
over the temperature range of -40°C to +105°C. Integrated
precision setting resistors make the DACs easy to use.
The MAX5717 and MAX5719 feature a 50MHz, 3-wire
SPI™, QSPI™, MICROWIRE™, and DSP-compatible
serial interface.
On power-up, the output resets to zero-scale, providing
additional safety for applications which drive valves or
other transducers that need to be off on power-up. The
DAC output settles in 750ns and has a low offset and
gain drift of ±0.1 ppm/°C of FSR.
The MAX5717 is functionally similar to the MAX542,
but with significantly faster settling time. The MAX5719
provides a similar speed improvement as well as an
increase in resolution to 20 bits.
●
16 and 20-bit resolution
●
1LSB INL (Max, 16-bit)
Benefits and Features
●
±0.5 LSB DNL (Max, MAX5717A)
●
750ns settling time (typ)
●
0.05 nV-sec glitch energy
● 6 nv/√Hz Output Noise Density
●
Integrated ±0.025% (max) Bipolar Setting Resistors
●
4.5V to 5.5V Supply Range
●
4.0V to V
DD
Reference Input Range
●
Safe Power-Up Reset-to-Zero-Scale DAC Output
(Unipolar)
●
50MHz 3-Wire SPI Interface
●
-40°C to +105°C Operating Temperature Range.
●
SO-14 Package
Simplified Block Diagram
V
DD
MAX5717/
MAX5719
RINV
REFF
REFS
AGNDF
AGNDS
16-/20-BIT DATA LATCH
CONTROL
LOGIC
SERIAL INPUT REGISTER
DGND
16-/20-BIT DAC
OUT
RFB
RFB
INV
Applications
●
●
●
●
●
●
●
●
●
Test and Measurement Equipment
Automatic Test Equipment
Gain and Offset Adjustment
Data-Acquisition Systems
Process Control and Servo Loops
Portable Instrumentation
Programmable Voltage and Current sources
Automatic Tuning
Communication Systems
CS
LDAC
SCLK
D
IN
Ordering Information
appears at end of data sheet.
19-8567; Rev 1; 1/17
MAX5717/MAX5719
16 and 20-Bit Voltage DACs
V
DD
to DGND ..........................................................-0.3V to +6V
CS,
SCLK, D
IN
,
LDAC
to DGND ....................... -0.3V to Lesser of V
DD
+ 0.3 and 6V
REFF, REFS to AGND ........-0.3V to Lesser of V
DD
+0.3 and 6V
AGNDF, AGNDS to DGND ...................................-0.3V to +0.3V
OUT, INV, to AGND,
DGND ..............................-0.3V to Lesser of V
DD
+0.3 and 6V
RFB to AGND, DGND ................................................-6V to +6V
Absolute Maximum Ratings
Maximum Current into Any Pin..................... -100mA to +100mA
Continuous Power Dissipation
(T
A
= +70°C, derate 8.33mW/°C above +70°C.).........667mW
Operating Temperature Range ......................... -40°C to +105°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................... 300°C
Soldering Temperature (reflow) ....................................... +260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
Thermal Resistance, Single-Layer Board
Junction-to-Ambient (θ
JA
)..........................................120°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ...............37°C/W
Thermal Resistance, Four-Layer Board
Junction-to-Ambient (θ
JA
)............................................84°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ...............34°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-
tutorial.
Electrical Characteristics
(V
DD
= 4.5V to 5.5V, AGND, DGND, AGNDF, AGNDS = 0V, V
REF
= V
REFF
= V
REFS
= 4.096V,
LDAC
= 0V, C
L
=10pF, R
L
= No Load,
T
A
= -40°C to +105°C, unless otherwise noted. Typical values are at T
A
= 25°C and V
DD
= 5V.)
PARAMETER
SYMBOL
MAX5717
MAX5719
MAX5717. Measured by a line passing
through D
IN
= 0 and (2
16
– 1).
Integral Nonlinearity
INL
MAX5717A. Measured by a line passing
through DIN = 0 and (2
16
- 1).
MAX5719. Measured by a line passing
through D
IN
= 0 and (2
20
– 1).
MAX5719A. Measured by a line passing
through DIN = 0 and (2
20
- 1).
MAX5717
Differential Nonlinearity
DNL
MAX5719
Code = 0, MAX5717
Zero-Code Offset Error
Code = 0, MAX5719
Zero-Code Temperature
Coefficient
Gain Error
Code = full scale
-0.003
-32
±2
±0.2
+0.003
+32
-2.0
-2
±1
±0.125
+2.0
+2
CONDITIONS
MIN
16
20
-4
-1
-64.0
-20
-0.5
±0.25
±0.25
±1
±1
±0.125
+4
+1
+64.0
+20
+0.5
TYP
MAX
UNITS
STATIC PERFORMANCE – ANALOG
Resolution
N
Bits
LSB
(16-bit)
LSB
(16-bit)
LSB
(20-bit)
LSB
(20-bit)
LSB
(16-bit)
LSB
(20-bit)
LSB
(16-bit)
LSB
(20-bit)
µV/°C
%
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2
MAX5717/MAX5719
16 and 20-Bit Voltage DACs
Electrical Characteristics (continued)
(V
DD
= 4.5V to 5.5V, AGND, DGND, AGNDF, AGNDS = 0V, V
REF
= V
REFF
= V
REFS
= 4.096V,
LDAC
= 0V, C
L
=10pF, R
L
= No Load,
T
A
= -40°C to +105°C, unless otherwise noted. Typical values are at T
A
= 25°C and V
DD
= 5V.)
PARAMETER
Gain Error Temperature
Coefficient
Output Voltage Range
Output Resistance
Bipolar Resistor Ratio
Bipolar Resistor Ratio Error
Bipolar Zero Offset Error
MAX5719
Bipolar Zero Temperature
Coefficient
REFERENCE INPUT
Reference Input Voltage
Range
Reference Input Resistance
Reference Input Capacitance
DYNAMIC PERFORMANCE - ANALOG
Voltage Output Slew-Rate
Settling Time
DAC Glitch Impulse
Digital Feedthrough
Output Voltage Spectral
Noise Density
Output Voltage Noise LF
Reference -3 dB Bandwidth
Reference Feedthrough
SR
C
L
= 10pF
To ±1.0 LSB of FS step (16-bit), ±16 LSB
(20-bit) from
CS
low to high, C
L
= 10pF.
To ±1.0 LSB of FS step (16-bit), ±16 LSB
(20-bit) from
LDAC
high to low, C
L
= 10pF.
Worst-case transition
Code = 0000h;
CS
= V
DD
,
LDAC
= 0;
SCLK, DIN = 0 to V
DD
levels.
f
SW
= 1kHz, code = midscale
0.1Hz to 10Hz
Code = 3FFFFh
Code = 0000h, Ref = 100mV
p-p
at 100kHz
100
1.5
µs
0.75
0.05
1.0
6
1
1
1
nV-s
nV-s
nV/
(Hz)
1/2
µV
p-p
MHz
mV p-p
V/µs
RREF
Code = 0
Code = full scale
4
2
3.9
75
120
V
DD
6
V
kΩ
pF
±80
±4
R
OUT
R
FB
/R
INV
R
FB
/R
INV
- 1
MAX5717
-0.025
±5
No load
AGND
2
1
+0.025
SYMBOL
CONDITIONS
MIN
TYP
±0.1
V
REF
MAX
UNITS
ppm/°C
V
kΩ
Ω/Ω
%
LSB
(16-bit)
LSB
(20-bit)
µV/°C
DYNAMIC PERFORMANCE - REFERENCE INPUT
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Maxim Integrated
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3
MAX5717/MAX5719
16 and 20-Bit Voltage DACs
Electrical Characteristics (continued)
(V
DD
= 4.5V to 5.5V, AGND, DGND, AGNDF, AGNDS = 0V, V
REF
= V
REFF
= V
REFS
= 4.096V,
LDAC
= 0V, C
L
=10pF, R
L
= No Load,
T
A
= -40°C to +105°C, unless otherwise noted. Typical values are at T
A
= 25°C and V
DD
= 5V.)
PARAMETER
Positive Supply Voltage
Supply Current
DIGITAL INPUTS
Input High Voltage
Input Low Voltage
Input Hysteresis
Input Current
Input Capacitance
TIMING CHARACTERISTICS
Serial Clock Frequency
SCLK Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS
Fall to SCLK Rise Setup
Time
CS
Fall to SCLK Rise Hold
Time
CS
Rise to SCLK Rise Hold
Time
D
IN
to SCLK Rise Setup
Time
D
IN
to SCLK Rise Hold Time
CS
Pulse-Width High
LDAC
Pulse Width
CS
High to
LDAC
Setup Time
Last Active Clock Edge to
Ready for DAC Output Update
t
CH
t
CL
t
CSSO
t
CSH0
t
CSH1
t
DS
t
DH
t
CSPW
t
LDPW
t
LDH
40% duty cycle.
40% duty cycle.
To first SCLK rising edge
Applies to inactive RE preceding 1st RE
Applies to 24
th
rising edge (MAX5719) or
16th rising edge (MAX5717).
f
SCLK
0
20
8
8
8
0
8
5
4.5
20
20
20
1210
1500
50
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
I
IN
C
IN
-1
V
IH
V
IL
150
±0.1
10
+1
0.7
0.3
V
DD
V
DD
mV
µA
pF
SYMBOL
V
DD
I
DD
DIN = SCLK =
CS
=
LDAC
= V
DD
When updating DAC, f
SCLK
= 50MHz
CONDITIONS
MIN
4.5
750
7
TYP
MAX
5.5
1050
UNITS
V
µA
mA
POWER SUPPLY REQUIREMENTS
Note 1:
Limits are 100% tested at T
A
= 25°C. Limits over the operating temperature range and relevant supply voltage range are
guaranteed by design and characterization.
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4
MAX5717/MAX5719
16 and 20-Bit Voltage DACs
Typical Operating Characteristics
V
DD
= 5V, V
REF
= 4.096V, T
A
= 25°C unless otherwise noted.
SUPPLY CURRENT
vs. TEMPERATURE
0.8
toc1
SUPPLY CURRENT
vs. REFERENCE VOLTAGE
0.8
toc2
ZERO-CODE OFFSET ERROR
vs. TEMPERATURE (MAX5717)
0.1
ZERO-CODE OFFSET ERROR (LSB)
toc3a
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
0.7
0.7
0.05
0.6
0.6
0
0.5
0.5
-0.05
0.4
0.4
-60 -40 -20
0
20
40
60
80
100 120
TEMPERATURE (°C)
4
4.2
4.4
4.6
4.8
5
-0.1
-60 -40 -20
0
20
40
60
80
100 120
REFERENCE VOLTAGE (V)
TEMPERATURE (°C)
ZERO-CODE OFFSET ERROR
vs. TEMPERATURE (MAX5719)
1.2
ZERO-CODE OFFSET ERROR (LSB)
toc3b
INL vs. TEMPERATURE
(MAX5717)
2.0
1.5
MAX INL (LSB)
MIN INL (LSB)
10.0
5.0
INL (LSB)
0.0
-5.0
-10.0
-15.0
toc4a
INL vs. TEMPERATURE
(MAX5719)
15.0
MAX INL (LSB)
MIN INL (LSB)
toc4b
0.9
INL (LSB)
1.0
0.5
0.0
-0.5
-1.0
-1.5
0.6
0.3
0
-60 -40 -20
0
20
40
60
80
100 120
-2.0
-60
-40
-20
0
20
40
60
80
100 120
-60
-40
-20
0
20
40
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (
o
C)
TEMPERATURE (
o
C)
DNL vs. TEMPERATURE
(MAX5717)
0.4
MAX DNL (LSB)
MIN DNL (LSB)
0.2
DNL (LSB)
DNL (LSB)
toc5a
DNL vs. TEMPERATURE
(MAX5719)
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
GAIN ERROR (LSB)
MAX DNL (LSB)
MIN DNL (LSB)
toc5b
GAIN ERROR
vs. TEMPERATURE (MAX5717)
0.2
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
toc6a
0.0
-0.2
-0.4
-60
-40
-20
0
20
40
60
80
100 120
-2.0
-60
-40
-20
0
20
40
60
80
100 120
-0.2
-60 -40 -20
0
20
40
60
80
100 120
TEMPERATURE (
o
C)
TEMPERATURE (
o
C)
TEMPERATURE (°C)
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