74AUP1G3208
Rev. 7 — 7 March 2017
Low-power 3-input OR-AND gate
Product data sheet
1
General description
The 74AUP1G3208 provides the Boolean function: Y = (A + B) × C. The user can choose
the logic functions OR, AND and OR-AND. All inputs can be connected to V
CC
or GND.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the
device when it is powered down.
2
Features and benefits
•
Wide supply voltage range from 0.8 V to 3.6 V
•
High noise immunity
•
Complies with JEDEC standards:
–
JESD8-12 (0.8 V to 1.3 V)
–
JESD8-11 (0.9 V to 1.65 V)
–
JESD8-7 (1.2 V to 1.95 V)
–
JESD8-5 (1.8 V to 2.7 V)
–
JESD8-B (2.7 V to 3.6 V)
•
ESD protection:
–
HBM JESD22-A114F Class 3A exceeds 5000 V
–
MM JESD22-A115-A exceeds 200 V
–
CDM JESD22-C101E exceeds 1000 V
•
Low static power consumption; I
CC
= 0.9 μA (maximum)
•
Latch-up performance exceeds 100 mA per JESD 78 Class II
•
Inputs accept voltages up to 3.6 V
•
Low noise overshoot and undershoot < 10 % of V
CC
•
I
OFF
circuitry provides partial Power-down mode operation
•
Multiple package options
•
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
Low-power 3-input OR-AND gate
74AUP1G3208
3
Ordering information
Package
Temperature
range
Name
SC-88
XSON6
XSON6
XSON6
XSON6
X2SON6
Table 1. Ordering information
Type number
Description
plastic surface-mounted package; 6 leads
plastic extremely thin small outline package; no leads;
6 terminals; body 1 × 1.45 × 0.5 mm
plastic extremely thin small outline package; no leads;
6 terminals; body 1 × 1 × 0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9 × 1.0 × 0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0 × 1.0 × 0.35 mm
plastic thermal extremely thin small outline package;
no leads; 6 terminals; body 1 × 0.8 × 0.35 mm
Version
SOT363
SOT886
SOT891
SOT1115
SOT1202
SOT1255
74AUP1G3208GW
74AUP1G3208GM
74AUP1G3208GF
74AUP1G3208GN
74AUP1G3208GS
74AUP1G3208GX
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
4
Marking
Marking code
a2
a2
a2
a2
a2
a2
[1]
Table 2. Marking
Type number
74AUP1G3208GW
74AUP1G3208GM
74AUP1G3208GF
74AUP1G3208GN
74AUP1G3208GS
74AUP1G3208GX
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5
Functional diagram
3
B
6
C
A
1
4
Y
001aad501
Figure 1. Logic symbol
74AUP1G3208
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 7 — 7 March 2017
2 / 22
Nexperia
Low-power 3-input OR-AND gate
74AUP1G3208
6
Pinning information
6.1 Pinning
74AUP1G3208
74AUP1G3208
A
GND
B
1
2
3
001aad500
A
1
6
C
6
5
4
C
V
CC
GND
2
5
V
CC
Y
B
3
4
Y
001aad507
Transparent top view
Figure 2. Pin configuration SOT363
74AUP1G3208
A
GND
B
1
2
3
6
5
4
C
V
CC
Y
Figure 3. Pin configuration SOT886
74AUP1G3208
A
1
GND
3
B
2
5
4
Y
C
6
V
CC
001aad506
Transparent top view
aaa-022052
Figure 4. Pin configuration SOT891, SOT1115 and
SOT1202
Transparent top view
Figure 5. Pin configuration SOT1255 (X2SON6)
6.2 Pin description
Table 3. Pin description
Symbol
A
GND
B
Y
V
CC
C
Pin
1
2
3
4
5
6
Description
data input A
ground (0 V)
data input B
data output Y
supply voltage
data input C
74AUP1G3208
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 7 — 7 March 2017
3 / 22
Nexperia
Low-power 3-input OR-AND gate
74AUP1G3208
7
Functional description
[1]
Table 4. Function table
Input
C
L
L
L
L
H
H
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level.
Output
B
L
L
H
H
L
L
H
H
A
L
H
L
H
L
H
L
H
Y
L
L
L
L
L
H
H
H
7.1 Logic configurations
Table 5. Function selection table
Logic function
2-input AND
2-input OR
3-input gate with the Boolean function: Y = (A + B) × C
Figure
see
Figure 6
and
Figure 7
see
Figure 8
see
Figure 9
B
C
Y
B
V
CC
1
2
3
6
5
4
C
Y
001aad502
A
C
Y
V
CC
A
1
2
3
6
5
4
C
Y
001aad503
Figure 6. 2-input AND gate
A
B
Y
V
CC
A
B
1
2
3
6
5
4
Figure 7. 2-input AND gate
A
B
C
V
CC
Y
A
B
Y
001aad504
1
2
3
6
5
4
C
Y
001aad505
Figure 8. 2-input OR gate
Figure 9. 3-input gate with the Boolean function:
Y = (A + B) × C
74AUP1G3208
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 7 — 7 March 2017
4 / 22
Nexperia
Low-power 3-input OR-AND gate
74AUP1G3208
8
Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Conditions
[1]
Min
-0.5
-0.5
-0.5
-50
-50
-
-
-50
-65
Max
+4.6
+4.6
+4.6
-
-
±20
50
-
+150
250
Unit
V
V
V
mA
mA
mA
mA
mA
°C
mW
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
= -40 °C to +125 °C
[2]
Active mode and Power-down mode
V
I
< 0 V
V
O
< 0 V
V
O
= 0 V to V
CC
[1]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SC-88 packages: above 87.5 °C the value of P
tot
derates linearly with 4.0 mW/K.
For XSON6 and X2SON6 packages: above 118 °C the value of P
tot
derates linearly with 7.8 mW/K.
9
Recommended operating conditions
Conditions
Min
0.8
0
Active mode
Power-down mode; V
CC
= 0 V
0
0
-40
V
CC
= 0.8 V to 3.6 V
-
Table 7. Recommended operating conditions
Symbol Parameter
V
CC
V
I
V
O
T
amb
Δt/ΔV
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
Max
3.6
3.6
V
CC
3.6
+125
200
Unit
V
V
V
V
°C
ns/V
74AUP1G3208
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 7 — 7 March 2017
5 / 22
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
