MJD44H11 (NPN),
MJD45H11 (PNP)
Complementary Power
Transistors
DPAK for Surface Mount Applications
Designed for general purpose power and switching such as output or
driver stages in applications such as switching regulators, converters,
and power amplifiers.
Features
http://onsemi.com
•
Lead Formed for Surface Mount Application in Plastic Sleeves
•
•
•
•
•
•
•
•
(No Suffix)
Straight Lead Version in Plastic Sleeves (“−1” Suffix)
Electrically Similar to Popular D44H/D45H Series
Low Collector Emitter Saturation Voltage
Fast Switching Speeds
Complementary Pairs Simplifies Designs
Epoxy Meets UL 94 V−0 @ 0.125 in
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
SILICON
POWER TRANSISTORS
8 AMPERES
80 VOLTS, 20 WATTS
COMPLEMENTARY
COLLECTOR
2, 4
COLLECTOR
2, 4
1
BASE
3
EMITTER
1
BASE
3
EMITTER
4
4
MAXIMUM RATINGS
(T
A
= 25_C, common for NPN and PNP, minus
sign, “−”, for PNP omitted, unless otherwise noted)
Rating
Collector−Emitter Voltage
Emitter−Base Voltage
Collector Current
−
Continuous
Collector Current
−
Peak
Total Power Dissipation
@ T
C
= 25°C
Derate above 25°C
Total Power Dissipation (Note 1)
@ T
A
= 25°C
Derate above 25°C
Operating and Storage Junction
Temperature Range
ESD
−
Human Body Model
ESD
−
Machine Model
Symbol
V
CEO
V
EB
I
C
I
CM
P
D
Max
80
5
8
16
20
0.16
1.75
0.014
−55
to +150
3B
C
Unit
Vdc
Vdc
Adc
Adc
W
W/°C
W
W/°C
°C
V
V
A
Y
WW
J4xH11
G
1 2
1
3
2
3
DPAK
CASE 369C
STYLE 1
IPAK
CASE 369D
STYLE 1
MARKING DIAGRAMS
P
D
T
J
, T
stg
HBM
MM
AYWW
J4
xH11G
DPAK
=
=
=
=
AYWW
J4
xH11G
IPAK
Assembly Location
Year
Work Week
Device Code
x = 4 or 5
= Pb−Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
September, 2013
−
Rev. 16
1
Publication Order Number:
MJD44H11/D
MJD44H11 (NPN), MJD45H11 (PNP)
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient (Note 2)
Lead Temperature for Soldering
Symbol
R
qJC
R
qJA
T
L
Max
6.25
71.4
260
Unit
°C/W
°C/W
°C
2. These ratings are applicable when surface mounted on the minimum pad sizes recommended.
ELECTRICAL CHARACTERISTICS
(T
A
= 25_C, common for NPN and PNP, minus sign, “−”, for PNP omitted, unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage
(I
C
= 30 mA, I
B
= 0)
Collector Cutoff Current
(V
CE
= Rated V
CEO
, V
BE
= 0)
Emitter Cutoff Current
(V
EB
= 5 Vdc)
ON CHARACTERISTICS
Collector−Emitter Saturation Voltage
(I
C
= 8 Adc, I
B
= 0.4 Adc)
Base−Emitter Saturation Voltage
(I
C
= 8 Adc, I
B
= 0.8 Adc)
DC Current Gain
(V
CE
= 1 Vdc, I
C
= 2 Adc)
(V
CE
= 1 Vdc, I
C
= 4 Adc)
DYNAMIC CHARACTERISTICS
Collector Capacitance
(V
CB
= 10 Vdc, f
test
= 1 Mhz)
MJD44H11, NJVMJD44H11G/T4G/RLG
MJD45H11, NJVMJD45H11G/T4G/RLG
Gain Bandwidth Product
(I
C
= 0.5 Adc, V
CE
= 10 Vdc, f = 20 Mhz)
MJD44H11, NJVMJD44H11G/T4G/RLG
MJD45H11, NJVMJD45H11G/T4G/RLG
SWITCHING TIMES
Delay and Rise Times
(I
C
= 5 Adc, I
B1
= 0.5 Adc)
MJD44H11, NJVMJD44H11G/T4G/RLG
MJD45H11, NJVMJD45H11G/T4G/RLG
Storage Time
(I
C
= 5 Adc, I
B1
= I
B2
= 0.5 Adc)
MJD44H11, NJVMJD44H11G/T4G/RLG
MJD45H11, NJVMJD45H11G/T4G/RLG
Fall Time
(I
C
= 5 Adc, I
B1
= I
B2
= 0.5 Adc)
MJD44H11, NJVMJD44H11G/T4G/RLG
MJD45H11, NJVMJD45H11G/T4G/RLG
t
d
+ t
r
−
−
t
s
−
−
t
f
−
−
140
100
−
−
500
500
−
−
ns
300
135
−
−
ns
ns
C
cb
−
−
f
T
−
−
85
90
−
−
45
130
−
−
MHz
pF
V
CE(sat)
V
BE(sat)
h
FE
−
−
60
40
−
−
−
−
1
1.5
−
−
Vdc
Vdc
−
V
CEO(sus)
I
CES
I
EBO
80
−
−
−
−
−
−
1.0
1.0
Vdc
mA
mA
Symbol
Min
Typ
Max
Unit
http://onsemi.com
2
MJD44H11 (NPN), MJD45H11 (PNP)
1
0.7
0.5
0.3
0.2
0.1
0.1
0.07
0.05
0.03
0.02
SINGLE PULSE
0.05
0.02
0.01
r(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
D = 0.5
0.2
R
qJC(t)
= r(t) R
qJC
R
qJC
= 6.25°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
- T
C
= P
(pk)
q
JC(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
0.01
0.01
0.02 0.03
0.05
0.1
0.2 0.3
0.5
1
2 3
5
t, TIME (ms)
10
20
30
50
100
200 300
500
1k
Figure 1. Thermal Response
20
IC, COLLECTOR CURRENT (AMP)
10
5
3
2
1
0.5
0.3
0.1
THERMAL LIMIT @ T
C
= 25°C
WIRE BOND LIMIT
5 ms
500
ms
dc
100
ms
1 ms
0.05
0.02
1
50
3
5
7 10
20 30
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
70 100
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
−
V
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 2 is based on T
J(pk)
= 150_C; T
C
is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T
J(pk)
≤
150_C. T
J(pk)
may be calculated from the data in
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
Figure 2. Maximum Forward Bias
Safe Operating Area
T
A
T
C
2.5 25
PD, POWER DISSIPATION (WATTS)
2 20
T
C
1.5 15
1 10
T
A
SURFACE
MOUNT
0.5
5
0
0
25
50
75
100
125
150
T, TEMPERATURE (°C)
Figure 3. Power Derating
http://onsemi.com
3
MJD44H11 (NPN), MJD45H11 (PNP)
1000
V
CE
= 1 V
150°C
25°C
100
−55°C
1000
V
CE
= 1 V
h
FE
, DC CURRENT GAIN
150°C
25°C
100
−55°C
h
FE
, DC CURRENT GAIN
10
0.01
0.1
1
10
10
0.01
0.1
1
10
I
C
, COLLECTOR CURRENT (A)
I
C
, COLLECTOR CURRENT (A)
Figure 4. MJD44H11 DC Current Gain
1000
V
CE
= 4 V
h
FE
, DC CURRENT GAIN
150°C
25°C
100
−55°C
h
FE
, DC CURRENT GAIN
1000
Figure 5. MJD45H11 DC Current Gain
V
CE
= 4 V
150°C
25°C
100
−55°C
10
0.01
0.1
1
10
10
0.01
0.1
1
10
I
C
, COLLECTOR CURRENT (A)
I
C
, COLLECTOR CURRENT (A)
Figure 6. MJD44H11 DC Current Gain
V
CE(sat)
, COLL−EMIT SATURATION VOLTAGE (V)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.01
0.1
1
25°C
−55°C
IC/IB = 20
150°C
V
CE(sat)
, COLL−EMIT SATURATION VOLTAGE (V)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.01
Figure 7. MJD45H11 DC Current Gain
IC/IB = 20
−55°C
25°C
150°C
10
0.1
1
10
I
C
, COLLECTOR CURRENT (A)
I
C
, COLLECTOR CURRENT (A)
Figure 8. MJD44H11 Saturation Voltage
V
CE(sat)
Figure 9. MJD45H11 Saturation Voltage
V
CE(sat)
http://onsemi.com
4
MJD44H11 (NPN), MJD45H11 (PNP)
1.4
V
BE(sat)
, BASE−EMIT SATURATION
VOLTAGE (V)
V
BE(sat)
, BASE−EMIT SATURATION
VOLTAGE (V)
1.2
1.0
0.8
0.6
0.4
0.2
0
0.01
0.1
1
150°C
IC/IB = 20
10
−55°C
25°C
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.01
0.1
1
150°C
IC/IB = 20
10
−55°C
25°C
I
C
, COLLECTOR CURRENT (A)
I
C
, COLLECTOR CURRENT (A)
Figure 10. MJD44H11 Saturation Voltage
V
BE(sat)
V
CE
, COLLECTOR−EMITTER VOLTAGE (V)
V
CE
, COLLECTOR−EMITTER VOLTAGE (V)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2 I
C
= 0.1 A 0.5 A
0
0.1
1
1A
10
I
C
= 3 A
100
1000
10,000
I
C
= 8 A
T
A
= 25°C
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
Figure 11. MJD45H11 Saturation Voltage
V
BE(sat)
T
A
= 25°C
I
C
= 8 A
I
C
= 3 A
1A
10
100
1000
10,000
0.2 I = 0.1 A 0.5 A
C
0
0.1
1
I
B
, BASE CURRENT (mA)
I
B
, BASE CURRENT (mA)
Figure 12. MJD44H11 Collector Saturation
Region
1000
1000
Figure 13. MJD45H11 Collector Saturation
Region
C, CAPACITANCE (pF)
C, CAPACITANCE (pF)
Cob
Cob
100
100
10
0.1
1
10
100
10
0.1
1
10
100
V
R
, REVERSE VOLTAGE (V)
V
R
, REVERSE VOLTAGE (V)
Figure 14. MJD44H11 Capacitance
Figure 15. MJD45H11 Capacitance
http://onsemi.com
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
