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74LVC573ADTR2G

产品描述Latches OCTAL D-TYPE TRANSPA
产品类别逻辑    逻辑   
文件大小94KB,共10页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
标准
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74LVC573ADTR2G概述

Latches OCTAL D-TYPE TRANSPA

74LVC573ADTR2G规格参数

参数名称属性值
Brand NameON Semiconductor
是否无铅不含铅
是否Rohs认证符合
厂商名称ON Semiconductor(安森美)
包装说明TSSOP,
制造商包装代码9.48
Reach Compliance Codecompliant
Factory Lead Time1 week
系列LVC/LCX/Z
JESD-30 代码R-PDSO-G20
JESD-609代码e4
长度6.5 mm
逻辑集成电路类型BUS DRIVER
湿度敏感等级1
位数8
功能数量1
端口数量2
端子数量20
最高工作温度125 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)260
传播延迟(tpd)18.4 ns
座面最大高度1.2 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)1.65 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
宽度4.4 mm
Base Number Matches1

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74LVC573A
Low-Voltage CMOS Octal
Transparent Latch
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74LVC573A is a high performance, non−inverting octal
transparent latch operating from a 1.2 to 3.6 V supply. High impedance
TTL compatible inputs significantly reduce current loading to input
drivers while TTL compatible outputs offer improved switching noise
performance. A V
I
specification of 5.5 V allows 74LVC573A inputs
to be safely driven from 5 V devices.
The 74LVC573A contains 8 D−type latches with 3−state outputs.
When the Latch Enable (LE) input is HIGH, data on the Dn inputs
enters the latches. In this condition, the latches are transparent, i.e., a
latch output will change state each time its D input changes. When LE
is LOW, the latches store the information that was present on the D
inputs a setup time preceding the HIGH−to−LOW transition of LE.
The 3−state standard outputs are controlled by the Output Enable (OE)
input. When OE is LOW, the standard outputs are enabled. When OE
is HIGH, the standard outputs are in the high impedance state, but this
does not interfere with new data entering into the latches.
Features
www.onsemi.com
MARKING
DIAGRAM
20
20
1
TSSOP−20
DT SUFFIX
CASE 948E
1
A
L, WL
Y, YY
W, WW
G or
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
LCX
573A
ALYWG
G
(Note: Microdot may be in either location)
Designed for 1.2 to 3.6 V V
CC
Operation
5 V Tolerant − Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V
24 mA Output Sink and Source Capability
Near Zero Static Supply Current in all Three Logic States (10
mA)
Substantially Reduces System Power Requirements
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
September, 2015 − Rev. 1
Publication Order Number:
74LVC373A/D

 
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