PD - 97362
IRLS3034-7PPbF
Applications
l
DC Motor Drive
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
HEXFET
®
Power MOSFET
D
Benefits
l
Optimized for Logic Level Drive
l
Very Low R
DS(ON)
at 4.5V V
GS
l
Superior R*Q at 4.5V V
GS
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
V
DSS
R
DS(on)
typ.
max.
I
D
(Silicon Limited)
I
D
(Package Limited)
D
40V
1.0m
Ω
1.4m
Ω
380A
c
240A
S
S
G
S
S
S
S
D
2
Pak 7 Pin
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
d
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
f
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Single Pulse Avalanche Energy
e
Avalanche Current
d
Repetitive Avalanche Energy
d
Max.
380c
270c
240
1540
380
2.5
± 20
1.3
-55 to + 175
300
Units
A
W
W/°C
V
V/ns
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
250
See Fig. 14, 15, 22a, 22b
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
Parameter
Junction-to-Case
kl
Junction-to-Ambient
j
Typ.
–––
–––
Max.
0.40
40
Units
°C/W
www.irf.com
1
1/12/09
IRLS3034-7PPbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
40
–––
–––
1.0
–––
–––
–––
–––
–––
––– –––
0.035 –––
1.0
1.4
1.2
1.7
–––
2.5
–––
20
––– 250
––– 100
––– -100
1.9
–––
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
I
DSS
I
GSS
R
G
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 5mAd
mΩ V
GS
= 10V, I
D
= 200A
g
V
GS
= 4.5V, I
D
= 180A
g
V V
DS
= V
GS
, I
D
= 250µA
µA V
DS
= 40V, V
GS
= 0V
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
S
nC
Conditions
V
DS
= 10V, I
D
= 220A
I
D
= 170A
V
DS
=20V
V
GS
= 4.5V
g
I
D
= 170A, V
DS
=0V, V
GS
= 4.5V
V
DD
= 26V
I
D
= 220A
R
G
= 2.7Ω
V
GS
= 4.5V
g
V
GS
= 0V
V
DS
= 40V
ƒ = 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 32V
i,
See Fig. 11
V
GS
= 0V, V
DS
= 0V to 32V
h
370 ––– –––
––– 120 180
–––
32
–––
–––
71
–––
–––
49
–––
–––
71
–––
––– 590 –––
–––
94
–––
––– 200 –––
––– 10990 –––
––– 2030 –––
––– 1100 –––
Effective Output Capacitance (Energy Related) ––– 2520 –––
Effective Output Capacitance (Time Related)h ––– 3060 –––
ns
pF
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
d
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
––– 380c
–––
1540
A
A
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
––– –––
1.3
V
–––
46
–––
ns
–––
49
–––
––– 100 –––
nC
T
J
= 125°C
––– 110 –––
–––
3.7
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 200A, V
GS
= 0V
g
T
J
= 25°C
V
R
= 34V,
I
F
= 220A
T
J
= 125°C
di/dt = 100A/µs
g
T
J
= 25°C
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 240A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.010mH
R
G
= 25Ω, I
AS
= 220A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
220A, di/dt
≤
1240A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
R
θJC
value shown is at time zero.
2
www.irf.com
IRFLS3034-7PPbF
100000
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
10000
≤
60µs PULSE WIDTH
Tj = 25°C
ID, Drain-to-Source Current (A)
TOP
ID, Drain-to-Source Current (A)
10000
1000
BOTTOM
1000
BOTTOM
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
≤
60µs PULSE WIDTH
Tj = 175°C
100
100
2.5V
10
2.5V
0.1
1
10
100
1
10
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
Fig 2.
Typical Output Characteristics
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
ID = 200A
VGS = 10V
1.5
100
T J = 175°C
10
T J = 25°C
1
VDS = 25V
≤60µs
PULSE WIDTH
0.1
1
2
3
4
5
1.0
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
5.0
ID= 170A
VGS, Gate-to-Source Voltage (V)
4.0
VDS= 32V
VDS= 20V
C, Capacitance (pF)
Ciss
10000
Coss
Crss
3.0
2.0
1.0
1000
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.0
0
25
50
75
100
125
150
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
www.irf.com
3
IRLS3034-7PPbF
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
T J = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
1msec
100µsec
100
100
Limited by package
10msec
T J = 25°C
10
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
0
1
DC
VGS = 0V
1.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VSD, Source-to-Drain Voltage (V)
10
100
Fig 7.
Typical Source-Drain Diode
Forward Voltage
400
Limited By Package
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
VDS, Drain-to-Source Voltage (V)
50
Id = 5mA
48
300
46
200
44
100
42
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
40
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs. Case Temperature
2.5
EAS , Single Pulse Avalanche Energy (mJ)
Fig 10.
Drain-to-Source Breakdown Voltage
1200
1000
800
600
400
200
0
ID
TOP
47A
94A
BOTTOM 220A
2.0
Energy (µJ)
1.5
1.0
0.5
0.0
-5
0
5
10 15 20 25 30 35 40 45
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFLS3034-7PPbF
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
0.0001
0.001
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
R
4
R
4
τ
C
τ
τ
2
τ
3
τ
4
τ
4
Ri (°C/W)
0.00741
0.05041
0.18384
0.15864
τi
(sec)
0.000005
0.000038
0.001161
0.008809
τ
1
Ci=
τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.01
0.1
0.001
1E-006
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
0.01
100
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Tj
= 150°C and
Tstart =25°C (Single Pulse)
1.0E-03
tav (sec)
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
300
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 220A
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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EAR , Avalanche Energy (mJ)
5
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