EVALUATION KIT AVAILABLE
MAX11905
20-Bit, 1.6Msps, Low-Power, Fully Differential
SAR ADC
General Description
The MAX11905 is a 20-bit, 1.6Msps, single-channel, fully
differential SAR ADC with internal reference buffers. The
MAX11905 provides excellent static and dynamic perfor-
mance with best-in-class power consumption that directly
scales with throughput. The device has a unipolar differ-
ential ±V
REF
input range. Supplies include a 3.3V supply
for the reference buffers, a 1.8V analog supply, a 1.8V
digital supply, and a 1.5V to 3.6V digital interface supply.
This ADC achieves 98.3dB SNR and -123dB THD, guar-
antees 20-bit resolution with no-missing codes and 6 LSB
INL (max).
The MAX11905 communicates data using a SPI-
compatible serial interface. The MAX11905 is offered in a
20-pin, 4mm x 4mm, TQFN package and is specified over
the -40°C to +85°C operating temperature range.
Benefits and Features
●
High DC/AC Accuracy Provides Better Measurement
Quality
• 20-Bit Resolution with No Missing Codes
• ±6 LSB INL and ±1 LSB DNL Maximum at 20 Bits
• 98.3dB SNR and 98.1dB SINAD at f
IN
= 10kHz
• -123dB THD at f
IN
= 10kHz
●
High Sampling Rate SAR Architecture Enables Fast
Settling and Acquisition
• 1.6Msps Throughput with No Pipeline Delay
●
Integration Simplifies Design
• Integrated Reference Buffers, V
REF
= 2.5V to 3.6V
• ±V
REF
Unipolar Differential Analog Input Range
●
Scalable Ultra-Low Power Supply Reduces Power
Consumption
• 9mW at 1.6Msps
●
Flexible Low-Voltage Supplies Save Cost
• 1.8V Analog and Digital Core Supply
• 1.5V to 3.6V Digital Interface Supply
• 3.3V REFVDD Reference Buffer Supply
●
Flexible, Industry-Standard Serial Interface and Small
Package Reduce Size
• SPI-/QSPI™-/MICROWIRE®/DSP-Compatible
• 20-Pin, 4mm x 4mm, TQFN Package
QSPI is a trademark of Motorola, Inc.
Applications
●
●
●
●
●
●
●
Test and Measurement
Automatic Test Equipment
Medical Instrumentation
Process Control and Industrial Automation
Data Acquisition Systems
Telecommunications
Battery-Powered Equipment
Application Diagram
3.6V
1.8V
1.8V
1.5 TO
3.6V
MICROWIRE is a registered trademark of National
Semiconductor Corporation.
Ordering Information
and
Selector Guide
appears at end of
data sheet.
3.3V
7.5Ω
0 TO 3.3V
1nF
COG
7.5Ω
3.3V TO 0V
REFIN
AIN+
REFVDD AVDD DVDD OVDD
DIN
16-Bit to 20-Bit SAR ADC Family
4-WIRE
SPI
INTERFACE
16-BIT
1.6Msps
1Msps
MAX11901
MAX11900
18-BIT
MAX11903
MAX11902
20-BIT
MAX11905
MAX11904
MAX11905
AIN-
SCLK
DOUT
CNVST
REF REFGND AGND DGND
3.3V
10µF
19-6860; Rev 3; 6/16
MAX11905
20-Bit, 1.6Msps, Low-Power, Fully Differential
SAR ADC
TABLE OF CONTENTS
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features and Benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
16-Bit to 20-Bit SAR ADC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Package Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input Settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Voltage Reference Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SPI Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Register Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Register Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Mode Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Conversion Result Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Chip ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Single-Ended Unipolar Input to Differential Unipolar Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Single-Ended Bipolar Input to Differential Unipolar Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Layout, Grounding, and Bypassing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Integral Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Differential Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Offset Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Gain Error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Signal-to-Noise Ratio. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Signal-to-Noise Plus Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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Maxim Integrated
│
2
MAX11905
20-Bit, 1.6Msps, Low-Power, Fully Differential
SAR ADC
TABLE OF CONTENTS (continued)
Effective Number of Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Total Harmonic Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Spurious-Free Dynamic Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Aperture Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Aperture Jitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Full-Power Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Selector Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Chip Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
LIST OF FIGURES
Figure 1. Signal Ranges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 2. Simplified Model of Input Sampling Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 3. Conversion Frame, SAR Conversion, Track and Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 4. Ideal Transfer Characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 5. Read During Track Phase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 6. Read During SAR Conversion Phase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 7. Split Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 8. SPI Interface Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 9. DIN Timing for Register Write Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 10. Timing Diagram for Data Out Reading After Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 11. Mode Register Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 12. Register Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 13. Unipolar Single-Ended Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 14. Bipolar Single-Ended Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 15. Top Layer Sample Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
LIST OF TABLES
Table 1. ADC Driver Amplifier Recommendation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 2. Voltage Reference Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 3. MAX11905 External Reference Recommendations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 4. Transfer Characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 5. DOUT Driver Strength . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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Maxim Integrated
│
3
MAX11905
20-Bit, 1.6Msps, Low-Power, Fully Differential
SAR ADC
Absolute Maximum Ratings
REFVDD, REF, REFIN, OVDD to GND ..................-0.3V to +4V
AVDD, DVDD to GND .............................................-0.3V to +2V
DGND to AGND, REFGND ..................................-0.3V to +0.3V
AIN+, AIN- to GND ...... -0.3V to the lower of (V
REF
+ 0.3V) and
+4V or ±130mA
SCLK, DIN, DOUT, CNVST, to GND ........... -0.3V to the lower of
(V
OVDD
+ 0.3V) and +4V
Maximum Current into Any Pin...........................................50mA
Continuous Power Dissipation (T
A
= +70°C)
TQFN (derate 30.30mW/°C above +70°C).............2424.2mW
Operating Temperature Range ........................... -40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
).... ......33°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ....... ........ 2°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(f
SAMPLE
= 1.6Msps, V
AVDD
= 1.8V, V
DVDD
= 1.8V, V
OVDD
= 1.5V to 3.6V, V
REFVDD
= 3.6V, V
REF
= 3.3V, Internal Ref Buffers On,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
ANALOG INPUT
Input Voltage Range (Note 3)
Absolute Input Voltage Range
Common-Mode Input Range
Input Leakage Current
Input Capacitance
STATIC PERFORMANCE (Note 4)
Resolution
Resolution
No Missing Codes
Offset Error (Note 4)
Offset Temperature Coefficient
Gain Error
Gain Error Temperature
Coefficient (Note 5)
Gain Error
Gain Error Temperature
Coefficient (Note 5)
Integral Nonlinearity
INL
Referred to REFIN reference input
Referred to REFIN reference input
Referred to REF pins
Referred to REF pins
-6
-42
-175
N
LSB
V
REF
= 3.3V
20
-10
±1
±0.01
±20
±0.2
±10
±0.12
±1.5
+6
+42
+175
+10
20
6.3
Bits
µV
Bits
LSB
LSB/°C
LSB
LSB/°C
LSB
LSB/°C
LSB
(AIN+) - (AIN-)
AIN+, AIN- relative to AGND
[(AIN+) + (AIN-)]/2
Acquisition phase
-V
REF
-0.1
V
REF
/2 -
0.1
-1
V
REF
/2
0.001
32
+V
REF
V
REF
+
0.1
V
REF
/2
+ 0.1
+1
V
V
V
µA
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
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Maxim Integrated
│
4
MAX11905
20-Bit, 1.6Msps, Low-Power, Fully Differential
SAR ADC
Electrical Characteristics (continued)
(f
SAMPLE
= 1.6Msps, V
AVDD
= 1.8V, V
DVDD
= 1.8V, V
OVDD
= 1.5V to 3.6V, V
REFVDD
= 3.6V, V
REF
= 3.3V, Internal Ref Buffers On,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
Differential Nonlinearity
(Note 6)
Analog Input CMR
Power-Supply Rejection
(Note 7)
Power-Supply Rejection
(Note 7)
Transition Noise
EXTERNAL REFERENCE
REF Voltage Input Range
Load Current
REF Input Capacitance
REFERENCE BUFFER
REFIN Input Voltage Range
REFIN Input Current
Turn-On Settling Time
External Compensation
Capacitor
Dynamic Range
Signal-to-Noise Ratio
Signal-to-Noise Plus Distortion
Spurious-Free Dynamic Range
Total Harmonic Distortion
Total Harmonic Distortion
Total Harmonic Distortion
SAMPLING DYNAMICS
Throughput
Full-Power Bandwidth
Acquisition Time
Aperture Delay
Aperture Jitter
t
ACQ
Time delay from CNVST rising edge
to time at which sample is taken for
conversion
-3dB point (targeting 20MHz)
-0.1dB point
100
1
3
0
20
3
1.6
Msps
MHz
ns
ns
ps
RMS
SNR
SINAD
SFDR
THD
THD
THD
C
EXT
V
REFIN
I
REFIN
C
EXT
= 10µF on REF pin,
C
REFIN
= 0.1µF on REFIN pin
REF pins
4.7
V
REF
< (V
REFVDD
- 200mV)
2.5
3
1
20
10
V
REFVDD
-
200mV
V
nA
ms
µF
V
REF
I
REF
1.6Msps, V
REF
= 3.3V
2.5
3.3
600
1
3.6
V
µA
nF
SYMBOL
DNL
CMR
PSR
PSR
DC
PSR vs. AVDD
PSR vs. REFVDD
CONDITIONS
MIN
-0.9
TYP
±0.5
16
2
3
4
MAX
+0.9
UNITS
LSB
LSB/V
LSB/V
LSB/V
LSB
RMS
DYNAMIC PERFORMANCE (Note 8)
Internal RefBuffer, -60dBFS input
Internal RefBuffer, f
IN
= 10kHz
Internal RefBuffer, f
IN
= 10kHz,
-0.1dBFs
Internal RefBuffer, f
IN
= 10kHz
Internal RefBuffer, f
IN
= 10kHz
Internal RefBuffer, f
IN
= 100kHz
Internal RefBuffer, f
IN
= 250kHz
97
97
99.0
98.3
98.1
125
-123
-115
-107
dB
dB
dB
dB
dB
dB
dB
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