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74LVC2GU04
Dual unbuffered inverter
Rev. 10 — 10 February 2017
Product data sheet
1. General description
The 74LVC2GU04 provides two unbuffered inverters. Each inverter is a single stage with
unbuffered output.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Input accepts voltages up to 5 V
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LVC2GU04GW
74LVC2GU04GV
74LVC2GU04GM
74LVC2GU04GF
74LVC2GU04GN
74LVC2GU04GS
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SC-88
TSOP6
XSON6
XSON6
XSON6
XSON6
Description
plastic surface-mounted package; 6 leads
plastic surface-mounted package (TSOP6);
6 leads
plastic extremely thin small outline package;
no leads; 6 terminals; body 1
1.45
0.5 mm
plastic extremely thin small outline package;
no leads; 6 terminals; body 1
1
0.5 mm
Version
SOT363
SOT457
SOT886
SOT891
Type number
extremely thin small outline package; no leads; SOT1115
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads; SOT1202
6 terminals; body 1.0
1.0
0.35 mm
NXP Semiconductors
74LVC2GU04
Dual unbuffered inverter
4. Marking
Table 2.
Marking codes
Marking
[1]
YD
VU4
YD
YD
YD
YD
Type number
74LVC2GU04GW
74LVC2GU04GV
74LVC2GU04GM
74LVC2GU04GF
74LVC2GU04GN
74LVC2GU04GS
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration SOT363
and SOT457
Fig 5.
Pin configuration SOT886
Fig 6.
Pin configuration SOT891,
SOT1115 and SOT1202
74LVC2GU04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet
Rev. 10 — 10 February 2017
2 of 19
NXP Semiconductors
74LVC2GU04
Dual unbuffered inverter
6.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
V
CC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data output
7. Functional description
Table 4.
Input
nA
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Output
nY
H
L
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
50
[1][2]
Max
+6.5
-
+6.5
-
V
CC
+ 0.5
50
100
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
C
mW
V
O
< 0 V
Active mode
V
O
= 0 V to V
CC
0.5
-
-
100
65
T
amb
=
40 C
to +125
C
[3]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When V
CC
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
For SC-88 and SC-74 packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
For XSON6 packages: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
74LVC2GU04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet
Rev. 10 — 10 February 2017
3 of 19
NXP Semiconductors
74LVC2GU04
Dual unbuffered inverter
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 1.65 V to 2.7 V
V
CC
= 2.7 V to 5.5 V
Active mode
Conditions
Min
1.65
0
0
40
-
-
Typ
-
-
-
-
-
-
Max
5.5
5.5
V
CC
+125
20
10
Unit
V
V
V
C
ns/V
ns/V
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
=
40 C
to +85
C
[1]
V
IH
V
IL
V
OH
HIGH-level input voltage
LOW-level input voltage
V
CC
= 1.65 V to 5.5 V
V
CC
= 1.65 V to 5.5 V
I
O
=
100 A;
V
CC
= 1.65 V to 5.5 V
I
O
=
4
mA; V
CC
= 1.65 V
I
O
=
8
mA; V
CC
= 2.3 V
I
O
=
12
mA; V
CC
= 2.7 V
I
O
=
24
mA; V
CC
= 3.0 V
I
O
=
32
mA; V
CC
= 4.5 V
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 100
A;
V
CC
= 1.65 V to 5.5 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
O
= 32 mA; V
CC
= 4.5 V
I
I
I
CC
C
I
input leakage current
supply current
input capacitance
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
V
I
= 5.5 V or GND; I
O
= 0 A;
V
CC
= 1.65 V to 5.5 V
V
CC
= 3.3 V; V
I
= GND to V
CC
[2]
Conditions
Min
0.75
V
CC
-
V
CC
0.1
1.2
1.9
2.2
2.3
3.8
-
-
-
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
5
Max
-
0.25
V
CC
-
-
-
-
-
-
0.1
0.45
0.3
0.4
0.55
0.55
1
4
-
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
pF
HIGH-level output voltage V
I
= V
IH
or V
IL
74LVC2GU04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet
Rev. 10 — 10 February 2017
4 of 19
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