PD - 97204
PROVISIONAL
l
l
l
l
l
l
l
l
l
RoHs Compliant
Lead-Free (Qualified up to 260°C Reflow)
Application Specific MOSFETs
Ideal for CPU Core DC-DC Converters
Low Conduction Losses
High Cdv/dt Immunity
Low Profile (<0.7mm)
Dual Sided Cooling Compatible
Compatible with existing Surface Mount Techniques
Typical values (unless otherwise specified)
DirectFET Power MOSFET
R
DS(on)
Q
rr
26nC
IRF6691PbF
IRF6691TRPbF
R
DS(on)
V
gs(th)
2.0V
V
DSS
tot
V
GS
20V max ±12V max 1.2mΩ@ 10V 1.8mΩ@ 4.5V
Q
g
Q
gd
15nC
Q
gs2
4.4nC
Q
oss
30nC
47nC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MT
DirectFET ISOMETRIC
Description
The IRF6691PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
TM
packag-
ing to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The
DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and
vapor phase, infra-red or convection soldering techniques. Application note AN-1035 is followed regarding the manufacturing
methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems,
improving previous best thermal resistance by 80%.
The IRF6691PbF balances industry leading on-state resistance while minimizing gate charge along with ultra low package
inductance to reduce both conduction and switching losses. This part contains an integrated Schottky diode to reduce the Qrr
of the body drain diode further reducing the losses in a Synchronous Buck circuit. The reduced losses make this product ideal
for high frequency/high efficiency DC-DC converters that power high current loads such as the latest generation of micropro-
cessors. The IRF6691PbF has been optimized for parameters that are critical in synchronous buck converter’s SyncFET
sockets.
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
D
@ T
C
= 25°C
I
DM
E
AS
I
AR
10
9
8
7
6
5
4
3
2
1
0
2
Max.
20
±12
32
26
180
260
230
26
VGS, Gate-to-Source Voltage (V)
Units
V
e
Continuous Drain Current, VGS @ 10V
e
Continuous Drain Current, V @ 10V
f
Pulsed Drain Current
g
Single Pulse Avalanche Energy
h
Avalanche Current
Ãg
GS
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
j
A
mJ
A
VDS= 16V
VDS= 10V
6.0
5.0
4.0
3.0
2.0
1.0
0.0
0
10
20
30
40
50
60
QG Total Gate Charge (nC)
Fig 2.
Total Gate Charge vs. Gate-to-Source Voltage
Typical RDS(on) (mΩ)
ID = 32A
ID= 17A
T J = 125°C
T J = 25°C
3
4
5
6
7
8
9
10
VGS, Gate -to -Source Voltage (V)
Fig 1.
Typical On-Resistance vs. Gate-to-Source Voltage
Notes:
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 0.72mH, R
G
= 25Ω, I
AS
= 26A.
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1
05/18/06
IRF6691PbF
Parameter
BV
DSS
∆ΒV
DSS
/∆T
J
R
DS(on)
V
GS(th)
∆V
GS(th)
/∆T
J
I
DSS
I
GSS
gfs
Q
g
Q
gs1
Q
gs2
Q
gd
Q
godr
Q
sw
Q
oss
R
G
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Q
gs2
+ Q
gd
)
Output Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
PROVISIONAL
Static @ T
J
= 25°C (unless otherwise specified)
Min.
20
–––
–––
–––
1.6
–––
–––
–––
–––
–––
–––
110
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
12
1.8
1.2
–––
-4.1
–––
–––
–––
–––
–––
–––
47
14
4.4
15
14
19
30
0.60
23
95
25
10
6580
2070
840
Max.
–––
–––
2.5
1.8
2.5
–––
1.4
500
5
100
-100
–––
71
–––
–––
–––
–––
–––
–––
1.5
–––
–––
–––
–––
–––
–––
–––
Units
V
Conditions
V
GS
= 0V, I
D
= 1.0mA
mV/°C Reference to 25°C, I
D
= 10mA
mΩ
V
GS
= 4.5V, I
D
= 12A
V
GS
= 10V, I
D
V
mA
µA
mA
nA
S
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 20V, V
GS
= 0V
V
DS
= 16V, V
GS
= 0V
V
DS
= 16V, V
GS
= 0V, T
J
= 125°C
V
GS
= 12V
V
GS
= -12V
V
DS
= 10V, I
D
= 26A
V
DS
= 10V
nC
V
GS
= 4.5V
I
D
= 17A
See Fig. 14
nC
Ω
V
DD
= 16V, V
GS
= 4.5V
ns
I
D
= 26A
See Fig. 15 & 16
V
GS
= 0V
pF
V
DS
= 10V
ƒ = 1.0MHz
V
DS
= 10V, V
GS
= 0V
i
= 15A
i
mV/°C I
D
= 10mA, reference to 25°C
Ãi
Clamped Inductive Load
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min.
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
32
26
Max.
200
j
Units
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 25A, V
GS
= 0V
Ã
260
0.65
48
39
V
ns
nC
T
J
= 25°C, I
F
= 25A
See Fig. 17
di/dt = 100A/µs
i
iÃ
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Pulse width
≤
400µs; duty cycle
≤
2%.
Calculated continuous current based on maximum allowable junction
temperature. Package limitation current is 150A.
2
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PROVISIONAL
IRF6691PbF
2.8
1.8
89
270
-40 to + 150
W
°C
A bsolute M axim um R atings
P
D
@ T
A
= 25°C
P
D
@ T
A
= 70°C
P
D
@ T
C
= 25°C
T
P
T
J
T
S TG
Therm al R esistance
P ower D issipation
P ower D issipation
P ower D issipation
P eak S oldering Tem perature
O perating Junction and
S torage T em perature R ange
e
e
f
P aram eter
R
θJA
R
θJA
R
θJA
R
θJ
C
R
θJ-PC
B
Junction-to-A m bient
Junction-to-A m bient
Junction-to-A m bient
Junction-to-C ase
Junction-to-P C B M ounted
Linear D erating F actor
em
km
lm
fm
e
Typ.
–––
12.5
20
–––
1.0
0.022
M ax.
45
–––
–––
1.4
–––
U n its
°C /W
W /°C
100
10
Thermal Response ( Z thJA )
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
τ
J
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
R
3
R
3
τ
3
R
4
R
4
τ
A
τ
1
τ
2
τ
3
τ
4
τ
4
τ
A
0.1
Ri (°C/W)
0.678
17.30
17.57
9.470
τi
(sec)
0.000860
0.577560
8.940000
106.0000
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
Ci=
τi/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.01
0.1
1
10
100
0.0001
1E-006
1E-005
0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Fig 3.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
Used double sided cooling , mounting pad.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
R
θ
is measured at
T
J
of approximately 90°C.
Surface mounted on 1 in. square Cu
(still air).
Mounted to a PCB
with
small clip heatsink (still air)
Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
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3
IRF6691PbF
1000
TOP
VGS
10V
7.0V
4.5V
4.0V
3.5V
3.2V
2.9V
2.7V
PROVISIONAL
1000
TOP
VGS
10V
7.0V
4.5V
4.0V
3.5V
3.2V
2.9V
2.7V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
2.7V
10
1
2.7V
≤
60µs PULSE WIDTH
0.1
0.1
1
Tj = 25°C
1
100
0.1
1
10
≤
60µs PULSE WIDTH
Tj = 150°C
10
100
Fig 4.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 5.
Typical Output Characteristics
1.5
ID, Drain-to-Source Current
(Α)
ID = 32A
VGS = 10V
100
10
T J = 150°C
1.0
T J = 25°C
1
VDS = 10V
≤60µs
PULSE WIDTH
0.1
1
2
3
4
5
0.5
-60 -40 -20
0
20
40
60
80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig 6.
Typical Transfer Characteristics
100000
Fig 7.
Normalized On-Resistance vs. Temperature
VGS = 0V,
f = 1 MHZ
C iss = C gs + Cgd, C ds SHORTED
C rss = C gd
C oss = C ds + Cgd
C, Capacitance(pF)
10000
Ciss
Coss
1000
Crss
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8.
Typical Capacitance vs.Drain-to-Source Voltage
4
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PROVISIONAL
IRF6691PbF
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100
T J = 150°C
T J = 25°C
10
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
100µsec
10
T A = 25°C
Tj = 150°C
Single Pulse
1
0
1
10
1msec
1
0.0
0.2
0.4
0.6
0.8
VGS = 0V
1.0
1.2
10msec
100
VSD, Source-to-Drain Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 9.
Typical Source-Drain Diode Forward Voltage
200
Fig10.
Maximum Safe Operating Area
2.5
ID, Drain Current (A)
150
125
100
75
50
25
0
25
50
75
100
125
150
T C , Case Temperature (°C)
VGS(th) Gate threshold Voltage (V)
175
2.0
ID = 250µA
1.5
1.0
-75
-50
-25
0
25
50
75
100
125
150
T J , Temperature ( °C )
Fig 11.
Maximum Drain Current vs. Case Temperature
1000
Fig 12.
Threshold Voltage vs. Temperature
EAS , Single Pulse Avalanche Energy (mJ)
800
ID
TOP
12A
15A
BOTTOM 26A
600
400
200
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 13.
Maximum Avalanche Energy vs. Drain Current
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