BF904; BF904R
N-channel dual gate MOS-FETs
Rev. 06 — 13 November 2007
Product data sheet
IMPORTANT NOTICE
Dear customer,
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- NXP Semiconductors, which will be used in future data sheets together with new contact
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depending on the version)
- © Koninklijke Philips Electronics N.V. (year). All rights reserved -
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NXP Semiconductors
NXP
Semiconductors
Product specification
N-channel dual gate MOS-FETs
FEATURES
•
Specially designed for use at 5 V supply voltage
•
Short channel transistor with high transfer admittance to
input capacitance ratio
•
Low noise gain controlled amplifier up to 1 GHz
•
Superior cross-modulation performance during AGC.
APPLICATIONS
•
VHF and UHF applications with 3 to 7 V supply voltage
such as television tuners and professional
communications equipment.
DESCRIPTION
Enhancement type field-effect transistor in a plastic
microminiature SOT143B and SOT143R package. The
transistor consists of an amplifier MOS-FET with source
BF904; BF904R
and substrate interconnected and an internal bias circuit to
ensure good cross-modulation performance during AGC.
CAUTION
This product is supplied in anti-static packing to
prevent damage caused by electrostatic discharge
during transport and handling. For further information,
refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A
and SNW-FQ-302B.
PINNING
PIN
1
2
3
4
SYMBOL
s, b
d
g
2
g
1
source
drain
gate 2
gate 1
DESCRIPTION
handbook, halfpage
d
3
d
handbook, halfpage
4
3
4
g
2
g1
g
2
g1
1
Top view
2
MAM124
2
s,b
Top view
1
MAM125 - 1
s,b
BF904 marking code:
%MC.
BF904R marking code:
%MD.
Fig.1 Simplified outline (SOT143B) and symbol.
Fig.2 Simplified outline (SOT143R) and symbol.
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
y
fs
C
ig1-s
C
rs
F
drain current
total power dissipation
operating junction temperature
forward transfer admittance
input capacitance at gate 1
reverse transfer capacitance
noise figure
f = 1 MHz
f = 800 MHz
PARAMETER
drain-source voltage
CONDITIONS
−
−
−
−
22
−
−
−
MIN.
−
−
−
−
25
2.2
25
2
TYP.
MAX.
7
30
200
150
30
2.6
35
−
UNIT
V
mA
mW
°C
mS
pF
fF
dB
Rev. 06 - 13 November 2007
2 of 14
NXP
Semiconductors
Product specification
N-channel dual gate MOS-FETs
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
DS
I
D
I
G1
I
G2
P
tot
PARAMETER
drain-source voltage
drain current
gate 1 current
gate 2 current
total power dissipation
BF904
BF904R
T
stg
T
j
Note
1. Device mounted on a printed-circuit board.
storage temperature
operating junction temperature
see Fig.3
T
amb
≤
50
°C;
note 1
T
amb
≤
40
°C;
note 1
−
−
−65
−
CONDITIONS
−
−
−
−
MIN.
BF904; BF904R
MAX.
7
30
±10
±10
200
200
+150
150
V
UNIT
mA
mA
mA
mW
mW
°C
°C
handbook, halfpage
250
MRA770
P
tot
(mW)
200
BF904
150
BF904R
100
50
0
0
50
100
150
200
Tamb (
o
C)
Fig.3 Power derating curves.
Rev. 06 - 13 November 2007
3 of 14
NXP
Semiconductors
Product specification
N-channel dual gate MOS-FETs
THERMAL CHARACTERISTICS
SYMBOL
R
th j-a
BF904
BF904R
R
th j-s
thermal resistance from junction to soldering point
BF904
BF904R
Notes
1. Device mounted on a printed-circuit board.
2. T
s
is the temperature at the soldering point of the source lead.
STATIC CHARACTERISTICS
T
j
= 25
°C
unless otherwise specified.
SYMBOL
V
(BR)G1-SS
V
(BR)G2-SS
V
(F)S-G1
V
(F)S-G2
V
G1-S(th)
V
G2-S(th)
I
DSX
I
G1-SS
I
G2-SS
Note
1. R
G1
connects gate 1 to V
GG
= 5 V; see Fig.20.
PARAMETER
gate 1-source breakdown voltage
gate 2-source breakdown voltage
forward source-gate 1 voltage
forward source-gate 2 voltage
gate 1-source threshold voltage
gate 2-source threshold voltage
drain-source current
gate 1 cut-off current
gate 2 cut-off current
CONDITIONS
V
G2-S
= V
DS
= 0; I
G1-S
= 10 mA
V
G1-S
= V
DS
= 0; I
G2-S
= 10 mA
V
G2-S
= V
DS
= 0; I
S-G1
= 10 mA
V
G1-S
= V
DS
= 0; I
S-G2
= 10 mA
V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 20
µA
V
G1-S
= V
DS
= 5 V; I
D
= 20
µA
V
G2-S
= 4 V; V
DS
= 5 V;
R
G1
= 120 kΩ; note 1
V
G2-S
= V
DS
= 0; V
G1-S
= 5 V
V
G1-S
= V
DS
= 0; V
G2-S
= 5 V
note 2
T
s
= 92
°C
T
s
= 78
°C
PARAMETER
thermal resistance from junction to ambient
CONDITIONS
note 1
BF904; BF904R
VALUE
500
550
290
360
UNIT
K/W
K/W
K/W
K/W
MIN.
6
6
0.5
0.5
0.3
0.3
8
−
−
MAX.
15
15
1.5
1.5
1
1.2
13
50
50
UNIT
V
V
V
V
V
V
mA
nA
nA
DYNAMIC CHARACTERISTICS
Common source; T
amb
= 25
°C;
V
DS
= 5 V; V
G2-S
= 4 V; I
D
= 10 mA; unless otherwise specified.
SYMBOL
y
fs
C
ig1-s
C
ig2-s
C
os
C
rs
F
PARAMETER
forward transfer admittance
input capacitance at gate 1
input capacitance at gate 2
drain-source capacitance
noise figure
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 200 MHz; G
S
= 2 mS; B
S
= B
Sopt
f = 800 MHz; G
S
= G
Sopt
; B
S
= B
Sopt
CONDITIONS
pulsed; T
j
= 25
°C
MIN.
22
−
1
1
−
−
−
TYP.
25
2.2
1.5
1.3
25
1
2
MAX.
30
2.6
2
1.6
35
1.5
2.8
UNIT
mS
pF
pF
pF
fF
dB
dB
reverse transfer capacitance f = 1 MHz
Rev. 06 - 13 November 2007
4 of 14
NXP
Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
40
Y fs
(mS)
30
MLD268
MRA769
handbook, halfpage
gain 0
reduction
(dB)
10
20
20
30
10
40
50
0
50
0
50
100
150
o
T j ( C)
0
1
2
3
VAGC (V)
4
f = 50 MHz.
Fig.4
Transfer admittance as a function of the
junction temperature; typical values.
Fig.5
Typical gain reduction as a function of
the AGC voltage.
handbook, halfpage
120
MRA771
MLD270
20
ID
(mA)
15
2V
V G2 S = 4 V
3V
2.5 V
Vunw
(dB
µ
V)
110
100
10
1.5 V
90
5
1V
80
0
10
20
30
40
50
gain reduction (dB)
0
0
0.4
0.8
1.2
2.0
1.6
V G1 S (V)
V
DS
= 5 V; V
GG
= 5 V; f
w
= 50 MHz.
f
unw
= 60 MHz; T
amb
= 25
°C;
R
G1
= 120 kΩ.
Fig.6
Unwanted voltage for 1% cross-modulation
as a function of gain reduction; typical
values; see Fig.20.
V
DS
= 5 V.
T
j
= 25
°C.
Fig.7 Transfer characteristics; typical values.
Rev. 06 - 13 November 2007
5 of 14
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