SR2
6 pin Smart Reset™
Datasheet
-
production data
Applications
Wearable
Activity tracker
Smartwatch
Smartglasses
UDFN6 (1.6 x 1.3 mm)
Features
Operating voltage 1.65 V to 5.5 V
Low supply current 1.5 µA
Integrated test mode
Dual Smart Reset™ push-button inputs with
fixed extended reset setup delay (t
SRC
) from
0.5 s to 10 s in 0.5 s steps (typ.), option with
internal pull-up resistor
Push-button controlled reset pulse duration
– Option 1: fully push-button controlled, no
fixed or minimum pulse width guaranteed
– Option 2: defined output reset pulse
duration (t
REC
), factory-programmed
No power-on reset
Single reset output
– Active low or active high
– Push-pull or open drain with optional pull-
up resistor
Fixed Smart Reset™ input logic voltage levels
Operating temperature: - 40 °C to +85 °C
UDFN6 package: 1.6 mm x 1.3 mm
ECOPACK
®
2 (RoHS compliant, Halogen-
Free)
May 2014
This is information on a product in full production.
DocID026047 Rev 2
1/22
www.st.com
Contents
SR2
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
2.2
2.3
2.4
2.5
Power supply (V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ground (V
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Smart Reset™ input (SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Smart Reset™ input (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Reset output (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
6
7
8
9
10
11
Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2/22
DocID026047 Rev 2
SR2
Description
1
Description
The Smart Reset™ devices provide a useful feature that ensures inadvertent short reset
push-button closures do not cause system resets. This is done by implementing extended
Smart Reset™ input delay time (t
SRC
) and combined push-button inputs, which together
ensures a safe reset and eliminates the need for a specific dedicated reset button.
This reset configuration provides versatility and allows the application to distinguish
between a software generated interrupt and a hard system reset. When the input push-
button are connected to microcontroller interrupt inputs, and are closed for a short time, the
processor can only be interrupted. If the system still does not respond properly, continuing
to keep the push-button closed for the extended setup time t
SRC
causes a hard reset of the
processor through the reset output.
The SR2 has two combined delayed Smart Reset™ inputs (SR0, SR1) with preset delayed
Smart Reset™ setup time (t
SRC
). The reset output is asserted after both of the Smart
Reset™ inputs were held active for the selected t
SRC
delay time. Depending on selected
option the RST output remains asserted either until at least one SR input goes to inactive
logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse
duration is fixed for t
REC
(i.e. factory-programmed). The reset output, RST, is active low or
active high, push-pull or open drain with optional pull-up resistor. The device fully operates
over a broad V
CC
range 1.65 V to 5.5 V. Below 1.575 V typ. the inputs are ignored and
outputs are deasserted; the deasserted reset output levels are then valid down to 1.0 V.
1.1
Test mode
After pull of SR0 up to V
TEST
or more (V
CC
+ 1.4 V, max.) we start counting initial shorten
t
SRC-INI
(42 ms, typ.). After t
SRC-INI
expires, the RST output either goes down for t
REC
(if
t
REC
option is used) or stays low as long as overvoltage on SR0 in detected (if t
REC
option is
not used). This is a feedback and a user knows that the device is locked in the test mode.
Each time both SR inputs are connected to ground in test mode a shorten t
SRC-SHORT
(21
ms, typ.) is used instead of long t
SRC
(0.5 s -10 s). Return from to normal mode is possible
by a new startup of the device (i.e. V
CC
goes to 0 V and back to its original state). In this way
the device can be quickly tested without repeating test mode triggering. Advantage of this
solution is pretty high glitch immunity, feedback to user about entry to the test mode and
testability within full V
CC
range.
DocID026047 Rev 2
3/22
22
Description
Figure 1. Logic diagram
VCC
SR2
SR
0
SR2
SR1
RST
GND
GAMS2602141440SG
Figure 2. Pin connections (top view)
VSS
SR 1
RST
1
2
3
6
V CC
SR 0
NC
SR2
5
4
GAMS2602141445SG
4/22
DocID026047 Rev 2
SR2
Table 1. Signal names
Pin Name
1
2
3
4
5
6
V
SS
SR1
RST
NC
SR0
V
CC
Type
Supply ground Ground
Input
Output
-
Input
Description
Description
Secondary push-button Smart Reset™ input. Active low. Optional pull-up resistor
Reset output
(open drain with optional pull-up resistor, active low)
(push-pull – active low or active high)
Not connected (not bonded; should be connected to V
SS
)
Primary push-button Smart Reset™ input. Active low. Optional pull-up resistor
Positive supply voltage for the device. A 0.1 µF decoupling ceramic capacitor is
Supply voltage recommended to be connected between V
CC
and V
SS
pins, as close to the SR2
device as possible
Figure 3. Block diagram
DocID026047 Rev 2
5/22
22
stm32/stm8
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