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Nexys 4™ FPGA Board Reference Manual
Revised April 11, 2016
This manual applies to the Nexys 4 rev. B
Overview
The Nexys 4 board is a complete, ready-to-use digital
circuit development platform based on the latest Artix-7™
Field Programmable Gate Array (FPGA) from Xilinx. With
its large, high-capacity FPGA (Xilinx part number
XC7A100T-1CSG324C), generous external memories, and
collection of USB, Ethernet, and other ports, the Nexys 4
can host designs ranging from introductory combinational
circuits to powerful embedded processors. Several built-in
peripherals, including an accelerometer, temperature
sensor, MEMs digital microphone, a speaker amplifier,
and a lot of I/O devices allow the Nexys 4 to be used for a
wide range of designs without needing any other
components.
The Artix-7 FPGA is optimized for high performance logic, and offers more capacity, higher performance,
and more resources than earlier designs. Artix-7 100T features include:
15,850 logic slices, each with four 6-input LUTs and 8 flip-flops
4,860 Kbits of fast block RAM
Six clock management tiles, each with phase-locked loop (PLL)
240 DSP slices
Internal clock speeds exceeding 450MHz
On-chip analog-to-digital converter (XADC)
The Nexys 4 also offers an improved collection of ports and peripherals, including:
16 user switches
USB-UART Bridge
12-bit VGA output
3-axis accelerometer
16Mbyte CellularRAM
Pmod for XADC signals
16 user LEDs
Two tri-color LEDs
PWM audio output
Temperature sensor
Serial Flash
Digilent USB-JTAG port for
FPGA programming and
communication
Two 4-digit 7-segment displays
Micro SD card connector
PDM microphone
10/100 Ethernet PHY
Four Pmod ports
USB HID Host for mice,
keyboards and memory sticks
DOC#:502-274
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
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Nexys 4™ FPGA Board Reference Manual
The Nexys 4 is compatible with Xilinx’s new high-performance Vivado
®
Design Suite as well as the ISE
toolset, which includes ChipScope and EDK. Xilinx offers free “Webpack” versions of these toolsets, so
designs can be implemented at no additional cost.
24
23
22
21
20
19
18
17
1
16
2
3
15
14
13
4
4
5
11
12
6
4
7
8
4
10
9
Figure 1. Nexys 4 board features
Callout
1
2
3
4
5
6
7
8
9
10
11
12
Component Description
Power select jumper and battery header
Shared UART/ JTAG USB port
External configuration jumper (SD / USB)
Pmod port(s)
Microphone
Power supply test point(s)
LEDs (16)
Slide switches
Eight digit 7-seg display
JTAG port for (optional) external cable
Five pushbuttons
Temperature sensor
Callout
13
14
15
16
17
18
19
20
21
22
23
24
Component Description
FPGA configuration reset button
CPU reset button (for soft cores)
Analog signal Pmod port (XADC)
Programming mode jumper
Audio connector
VGA connector
FPGA programming done LED
Ethernet connector
USB host connector
PIC24 programming port (factory use)
Power switch
Power jack
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Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Nexys 4™ FPGA Board Reference Manual
A growing collection of board support IP, reference designs, and add-on boards are available on the
Digilent website. See the Nexys 4 page at
www.digilentinc.com
for more information.
1
Power Supplies
The Nexys 4 board can receive power from the Digilent USB-JTAG port (J6) or from an external power supply.
Jumper JP3 (near the power jack) determines which source is used.
All Nexys 4 power supplies can be turned on and off by a single logic-level power switch (SW16). A power-good LED
(LD22), driven by the “power good” output of the ADP2118 supply, indicates that the supplies are turned on and
operating normally. An overview of the Nexys 4 power circuit is shown in Fig 2
.
Power
Jack
(J13)
Power
Switch
(SW16)
VIN
3A
PGOOD
VU5V0
3.3V
Power On
LED (LD22)
JP3
Micro-USB
Port (J6)
J12
EN
IC17: ADP2118
VIN
EN
800 mA
1.8V
Power Source Select
JP3
J12
USB
WALL
BATTERY
IC23: ADP2138
VIN
EN
PGOOD
3A
1.0V
IC22: ADP2118
Figure 2. Nexys 4 Power Circuit
The USB port can deliver enough power for the vast majority of designs. A few demanding applications, including
any that drive multiple peripheral boards, might require more power than the USB port can provide. Also, some
applications may need to run without being connected to a PC’s USB port. In these instances an external power
supply or battery pack can be used.
An external power supply can be used by plugging into to the power jack (JP3) and setting jumper J13 to “wall”.
The supply must use a coax, center-positive 2.1mm internal-diameter plug, and deliver 4.5VDC to 5.5VDC and at
least 1A of current (i.e., at least 5W of power). Many suitable supplies can be purchased through Digikey or other
catalog vendors.
An external battery pack can be used by connecting the battery’s positive terminal to the center pin of JP3 and the
negative terminal to the pin labeled J12 directly below JP3. Since the main regulator on the Nexys 4 cannot
accommodate input voltages over 5.5VDC, an external battery pack must be limited to 5.5VDC. The minimum
voltage of the battery pack depends on the application -if the USB Host function (J5) is used, at least 4.6V needs to
be provided. In other cases the minimum voltage is 3.6V.
Voltage regulator circuits from Analog Devices create the required 3.3V, 1.8V, and 1.0V supplies from the main
power input. Table 2 provides additional information (typical currents depend strongly on FPGA configuration and
the values provided are typical of medium size/speed designs).
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
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Nexys 4™ FPGA Board Reference Manual
Supply
3.3V
1.0V
1.8V
Circuits
FPGA I/O, USB ports, Clocks,
RAM I/O, Ethernet, SD slot,
Sensors, Flash
FPGA Core
FPGA Auxiliary and Ram
Device
IC17: ADP2118
IC22: ADP2118
IC23: ADP2138
Current (max/typical)
3A/0.1 to 1.5A
3A/ 0.2 to 1.3A
800mA/ 0.05 to 0.15A
Table 2. Nexys 4 Power Supplies
2
FPGA Configuration
After power-on, the Artix-7 FPGA must be configured (or programmed) before it can perform any functions. You
can configure the FPGA in one of four ways:
1.
2.
3.
4.
A PC can use the Digilent USB-JTAG circuitry (portJ6, labeled “PROG”) to program the FPGA any time the
power is on.
A file stored in the nonvolatile serial (SPI) flash device can be transferred to the FPGA using the SPI port.
A programming file can be transferred to the FPGA from a micro SD card.
A programming file can be transferred from a USB memory stick attached to the USB HID port.
Figure 3 Shows the different options available for configuring the FPGA. An on-board “mode” jumper (JP1) and a
media selection jumper (JP2) select between the programming modes.
USB-JTAG/UART Port
Micro-AB USB
Connector (J6)
USB
Controller
JTAG
Port
SPI
Port
SPI Quad mode
Flash
6-pin JTAG
Header (J10)
1x6 JTAG
Header
Mode (JP1)
Artix-7
M0
M2
M1
User I/O
JP2
NA
NA
JP1
SPI Flash
JTAG
USB
MicroSD
Micro SD
Connector (J1)
Type A USB Host
Connector (J5)
2
PIC24
Serial
Prog. Port
Done
Prog
Programming Mode
Media Select
(JP2)
Figure 3. Nexys 4 Configuration Options
The FPGA configuration data is stored in files called bitstreams that have the .bit file extension. The ISE or Vivado
software from Xilinx can create bitstreams from VHDL, Verilog, or schematic-based source files (in the ISE toolset,
EDK is used for MicroBlaze™ embedded processor-based designs).
Bitstreams are stored in SRAM-based memory cells within the FPGA. This data defines the FPGA’s logic functions
and circuit connections, and it remains valid until it is erased by removing board power, by pressing the reset
button attached to the PROG input, or by writing a new configuration file using the JTAG port.
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
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Nexys 4™ FPGA Board Reference Manual
An Artix-7 100T bitstream is typically 30,606,304 bits and can take a long time to transfer. The time it takes to
program the Nexys 4 can be decreased by compressing the bitstream before programming, and then allowing the
FPGA to decompress the bitsream itself during configuration. Depending on design complexity, compression ratios
of 10x can be achieved. Bitstream compression can be enabled within the Xilinx tools (ISE or Vivado) to occur
during generation. For instructions on how to do this, consult the Xilinx documentation for the toolset being used.
After being successfully programmed, the FPGA will cause the "DONE" LED to illuminate. Pressing the “PROG”
button at any time will reset the configuration memory in the FPGA. After being reset, the FPGA will immediately
attempt to reprogram itself from whatever method has been selected by the programming mode jumpers.
The following sections provide greater detail about programming the Nexys 4 using the different methods
available.
2.1
JTAG Programming
The Xilinx tools typically communicate with FPGAs using the Test Access Port and Boundary-Scan Architecture,
commonly referred to as JTAG. During JTAG programming, a .bit file is transferred from the PC to the FPGA using
the onboard Digilent USB-JTAG circuitry (port J6) or an external JTAG programmer, such as the Digilent JTAG-HS2,
attached to port J10. You can perform JTAG programming any time after the Nexys 4 has been powered on,
regardless of what the mode jumper (JP1) is set to. If the FPGA is already configured, then the existing
configuration is overwritten with the bitstream being transmitted over JTAG. Setting the mode jumper to the JTAG
setting (seen in Fig 3) is useful to prevent the FPGA from being configured from any other bitstream source until a
JTAG programming occurs.
Programming the Nexys 4 with an uncompressed bitstream using the on-board USB_JTAG circuitry usually takes
around five seconds. JTAG programming can be done using the hardware server in Vivado or the iMPACT tool
included with ISE and the labtools version of Vivado. The demonstration project available at digilentinc.com gives
an in depth tutorials on how to program your board.
2.2
Quad-SPI Programming
When programming a nonvolatile flash device, a bitstream file is transferred to the flash in a two-step process.
First, the FPGA is programmed with a circuit that can program flash devices, and then data is transferred to the
flash device via the FPGA circuit (this complexity is hidden from the user by the Xilinx tools). After the flash device
has been programmed, it can automatically configure the FPGA at a subsequent power-on or reset event as
determined by the mode jumper setting (see Fig 3). Programming files stored in the flash device will remain until
they are overwritten, regardless of power-cycle events.
Programming the flash can take as long as four to five minutes, which is mostly due to the lengthy erase process
inherent to the memory technology. Once written however, FPGA configuration can be very fast-- less than a
second. Bitstream compression, SPI bus width, and configuration rate are factors controlled by the Xilnx tools that
can affect configuration speed.
Quad-SPI programming can be done using the iMPACT tool included with ISE or the labtools version of Vivado.
2.3
USB Host and Micro SD Programming
You can program the FPGA from a pen drive attached to the USB-HID port (J5) or a microSD card inserted into J1 by
doing the following:
1.
Format the storage device (Pen drive or microSD card) with a FAT32 file system.
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Other product and company names mentioned may be trademarks of their respective owners.
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