TJA1028
LIN transceiver with integrated voltage regulator
Rev. 4 — 25 July 2012
Product data sheet
1. General description
The TJA1028 is a LIN 2.0/2.1/SAE J2602 transceiver with an integrated low-drop voltage
regulator. The voltage regulator can deliver up to 70 mA and is available in 3.3 V and
5.0 V variants. TJA1028 facilitates the development of compact nodes in Local
Interconnect Network (LIN) bus systems. To support robust designs, the TJA1028 offers
strong ElectroStatic Discharge (ESD) performance and can withstand high voltages on the
LIN bus. In order to minimize current consumption, the TJA1028 supports a Sleep mode
in which the LIN transceiver and the voltage regulator are powered down while still having
wake-up capability via the LIN bus.
The TJA1028 comes in an SO8 package, and also in a 3 mm
3 mm HVSON8 package
that reduces the required board space by over 70 %. This feature can prove extremely
valuable when board space is limited.
2. Features and benefits
LIN 2.0/2.1/2.2 compliant
SAE J2602 compliant
Downward compatible with LIN 1.3
Internal LIN slave termination resistor
Voltage regulator offering 5 V or 3.3 V, 70 mA capability
2
% voltage regulator accuracy over specified temperature and supply ranges
Voltage regulator output undervoltage detection with reset output
Voltage regulator is short-circuit proof to ground
Voltage regulator stable with ceramic, tantalum and aluminum electrolyte capacitors
Robust ESD performance;
8
kV according to IEC61000-4-2 for pins LIN and V
BAT
Pins LIN and V
BAT
protected against transients in the automotive environment
(ISO 7637)
Very low LIN bus leakage current of < 2
A
when battery not connected
LIN pin short-circuit proof to battery and ground
Transmit data (TXD) dominant time-out function
Thermally protected
Very low ElectroMagnetic Emission (EME)
High ElectroMagnetic Immunity (EMI)
Typical Standby mode current of 45
A
Typical Sleep mode current of 12
A
LIN bus wake-up function
K-line compatible
Available in SO8 and HVSON8 packages
NXP Semiconductors
TJA1028
LIN transceiver with integrated voltage regulator
Leadless HVSON8 package (3.0 mm
3.0 mm) with improved Automated Optical
Inspection (AOI) capability
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
3. Ordering information
Table 1.
Ordering information
Package
Name
TJA1028T/xxx/xx
[1][2]
TJA1028TK/xxx/xx
[1][2]
SO8
HVSON8
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3
3
0.85 mm
Version
SOT96-1
SOT782-1
Type number
[1]
[2]
TJA1028T/5V0/xx and TJA1028TK/5V0/xx for the versions with the 5 V regulator; TJA1028T/3V3/xx and TJA1028TK/3V3/xx for the
versions with the 3.3 V regulator.
TJA1028T/xxx/20 and TJA1028TK/xxx/20 for the normal slope versions that support baud rates up to 20 kBd; TJA1028T/xxx/10 and
TJA1028TK/xxx/10 for the low slope versions that support baud rates up to 10.4 kBd (SAE J2602).
4. Marking
Table 2.
Marking codes
Marking
1028/51
1028/52
1028/31
1028/32
28/51
28/52
28/31
28/32
Type number
TJA1028T/5V0/10
TJA1028T/5V0/20
TJA1028T/3V3/10
TJA1028T/3V3/20
TJA1028TK/5V0/10
TJA1028TK/5V0/20
TJA1028TK/3V3/10
TJA1028TK/3V3/20
TJA1028
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 25 July 2012
2 of 24
NXP Semiconductors
TJA1028
LIN transceiver with integrated voltage regulator
5. Block diagram
V
BAT
VOLTAGE
REFERENCE
V
BAT
UV
DET
V
CC
VREG
V
CC
UV
DET
EN
OVERTEMP
DETECTION
CONTROL
V
BAT
V
CC
RSTN
LIN
Rx
RXD
V
CC
Tx
LIN
TXD
TIMEOUT
TIMER
TJA1028
GND
TXD
015aaa085
Fig 1.
Block diagram
TJA1028
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 25 July 2012
3 of 24
NXP Semiconductors
TJA1028
LIN transceiver with integrated voltage regulator
6. Pinning information
6.1 Pinning
terminal 1
index area
V
BAT
EN
V
BAT
EN
GND
LIN
1
2
8
7
V
CC
GND
RSTN
TXD
RXD
LIN
4
5
RXD
1
2
8
7
V
CC
RSTN
TXD
TJA1028TK
3
6
TJA1028T
3
4
015aaa082
6
5
015aaa244
Transparent top view
a. TJA1028T/xxx/xx: SO8
Fig 2.
Pin configuration diagrams
b. TJA1028TK/xxx/xx: HVSON8
6.2 Pin description
Table 3.
Symbol
V
BAT
EN
GND
LIN
RXD
TXD
RSTN
V
CC
[1]
Pin description
Pin
1
2
3
[1]
4
5
6
7
8
Description
battery supply for the TJA1028
enable input
ground
LIN bus line
LIN receive data output
LIN transmit data input
reset output (active LOW)
voltage regulator output
For enhanced thermal and electrical performance, the exposed center pad of the HVSON8 package should
be soldered to board ground (and not to any other voltage level).
7. Functional description
The TJA1028 combines the functionality of a LIN transceiver and a voltage regulator in a
single chip and offers wake-up by bus activity. The voltage regulator is designed to power
the Electronic Control Unit’s (ECU) microcontroller and its peripherals.
The LIN transceiver is the interface between a LIN master/slave protocol controller and
the physical bus in a LIN network. According to the Open System Interconnect (OSI)
model, these modules make up the LIN physical layer.
TJA1028
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 25 July 2012
4 of 24
NXP Semiconductors
TJA1028
LIN transceiver with integrated voltage regulator
The TJA1028T/xxx/20 and TJA1028TK/xxx/20 versions are optimized for a transmission
speed of 20 kBd, the maximum specified in the LIN standard. The TJA1028T/xxx/10 and
TJA1028TK/xxx/10 versions are optimized for a transmission speed of 10.4 kBd, as
specified in SAE J2602. All versions achieve optimum ElectroMagnetic Compatibility
(EMC) performance by wave shaping the LIN output.
7.1 LIN 2.x/SAE J2602 compliant
The TJA1028 is fully LIN 2.0, LIN 2.1, LIN 2.2 and SAE J2602 compliant. Since the LIN
physical layer is independent of higher OSI model layers (e.g. the LIN protocol), nodes
containing a LIN 2.2-compliant physical layer can be combined, without restriction, with
LIN physical layer nodes that comply with earlier revisions (i.e. LIN 1.0, LIN 1.1, LIN 1.2,
LIN 1.3, LIN 2.0 and LIN 2.1).
7.2 Operating modes
The TJA1028 supports four operating modes: Normal, Standby, Sleep and Off. The
operating modes, and the transitions between modes, are illustrated in
Figure 3.
AII states
V
BAT
< V
th(det)poff
OR
T
vj
> T
th(act)otp
remote
wake-up
OFF
LIN = off
RXD = floating
RSTN = LOW
V
BAT
> V
th(det)pon AND
T
vj
< T
th(rel)otp
STANDBY
LIN = off
(RXD signals
wake source)
EN = 1 AND
RSTN = 1
EN = 1 0 AND
TXD = 1 AND
RSTN = 1
NORMAL
(1)
LIN = on
EN = 1
0 AND
(3)
EN = 1 TXD = 0 AND
RSTN = 1
wake-up
(3)
event
SLEEP
LIN = off
RXD = V
CC(2)
RSTN = LOW
015aaa086
Voltage regulator - on
Voltage regulator - off
(1) In Normal mode, the LIN transmitter is enabled - but if EN and/or RSTN go LOW, the LIN
transmitter will be disabled. Remote wake-up signalling will be activated.
(2) Until V
CC
drops below 2 V.
(3) If a wake-up event and a go-to-sleep event occur simultaneously, the device will switch directly to
Standby mode without initiating a reset.
Fig 3.
State diagram
TJA1028
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 25 July 2012
5 of 24
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