SMT inductors
SIMID series, SIMID 0805-F
Series/Type:
Date:
B82498F
October 2017
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EPCOS AG 2017. Reproduction, publication and dissemination of this publication, enclosures hereto and the
information contained therein without EPCOS’ prior express consent is prohibited.
EPCOS AG is a TDK Group Company.
SMT inductors, SIMID series
SIMID 0805-F
Size 0805 (EIA) and/or 2012 (IEC)
Rated inductance 2.7 ... 6800 nH
Rated current 80 ... 1000 mA
Construction
■
Cubic coil with ceramic or ferrite core
■
Epoxy-molded flat top for vacuum pickup
■
Winding ends welded to terminals
B82498F
Features
■
■
■
■
High resonance frequency
Narrow inductance tolerance
Suitable for lead-free reflow soldering
RoHS-compatible
Applications
Resonant circuits, impedance matching for
■
Antenna amplifiers
■
Multimedia
■
Wireless communication systems
Terminals
■
Base material Al
2
O
3
ceramic and ferrite
■
Thick-film coating of Ag/Pd/Pt
Marking
■
No marking on component
■
Minimum data on reel:
Manufacturer, ordering code,
L
value, quantity, date of packing
Delivery mode and packing unit
■
8-mm blister tape, wound on 180-mm reel
■
Packing unit: 3000 pcs./reel
Please read
Cautions and warnings
and
Important notes
at the end of this document.
2
10/17
SMT inductors, SIMID series
SIMID 0805-F
Dimensional drawing and layout recommendation
B82498F
A
1.5 0.2
B
3.2 0.4
C
1.0 0.1
Dimensions in mm
Taping and packing
Blister tape
Reel
Dimensions in mm
Please read
Cautions and warnings
and
Important notes
at the end of this document.
3
10/17
SMT inductors, SIMID series
SIMID 0805-F
Technical data and measuring conditions
Rated inductance
L
R
Q factor
Q
min
Rated temperature T
R
Rated current
I
R
B82498F
Measured with impedance analyzer Agilent E4991A
at frequency
f
L
, 0.1 V, +20 °C
Measured with impedance analyzer Agilent E4991A
at frequency
f
Q
, +20 °C
+105 C
Maximum permissible DC with inductance decrease
L/L
0
10% and temperature increase
of 20 K at rated temperature
Measured with network analyzer Agilent E8362B
and/or Agilent E4991A, +20 °C
Measured at +20 °C
Sn95.5Ag3.8Cu0.7: +(245 5) °C, (5 0.3) s
Wetting of soldering area 90%
(based on IEC 60068-2-58)
+260 C, 20 s
55/125/56 (to IEC 60068-1)
Mounted:
Packaged:
55 °C … +125 °C
25 °C … +40 °C, 75% RH
Self-resonance frequency
f
res,min
DC resistance R
max
Solderability (lead-free)
Resistance to soldering heat
Climatic category
Storage conditions
Weight
Approx. 10 mg
Please read
Cautions and warnings
and
Important notes
at the end of this document.
4
10/17
SMT inductors, SIMID series
SIMID 0805-F
Characteristics and ordering codes
L
R
nH
Core material: ceramic
2.7
5.6
6.8
8.2
10
12
15
18
22
27
33
39
47
56
68
82
100
120
150
180
220
270
330
390
470
560
680
820
2%
5%
^
^
B82498F
Tolerance
f
L
MHz
Q
min
f
Q
MHz
I
R
mA
1000
900
800
700
700
700
650
700
700
700
600
600
600
600
500
500
450
440
400
340
320
270
220
210
190
230
190
180
R
max
f
res,min
MHz
Ordering code
1)
10%
^
K
250
250
250
250
50
50
50
50
50
50
50
60
60
60
65
65
65
60
60
60
55
50
45
45
45
45
45
40
30
23
23
23
1500
1000
1000
1000
500
500
500
500
500
500
500
500
500
500
500
500
500
250
250
250
250
250
250
250
100
50
50
50
0.03
0.04
0.05
0.09
0.09
0.09
0.13
0.08
0.08
0.09
0.11
0.12
0.13
0.14
0.18
0.19
0.28
0.31
0.42
0.53
0.70
1.0
1.5
1.6
1.9
1.3
1.7
1.9
9000
7000
6000
5000
5000
4000
3300
3300
2500
2500
2200
2100
2000
1700
1600
1500
1350
1250
1150
1050
950
900
800
700
650
400
300
300
B82498F3279K000
B82498F3569K000
B82498F3689K000
B82498F3829K000
B82498F3100+000
B82498F3120+000
B82498F3150+000
B82498F3180+000
B82498F3220+000
B82498F3270+000
B82498F3330+000
B82498F3390+000
B82498F3470+000
B82498F3560+000
B82498F3680+000
B82498F3820+000
B82498F3101+000
B82498F3121+000
B82498F3151+000
B82498F3181+000
B82498F3221+000
B82498F3271+000
B82498F3331+000
B82498F3391+000
B82498F3471+000
B82498F3561+000
B82498F3681+000
B82498F3821+000
G
J
250
250
250
250
250
250
250
250
200
200
200
150
150
150
100
100
100
100
100
100
50
25
25
25
1) Replace the + by the code letter for the required inductance tolerance.
Please read
Cautions and warnings
and
Important notes
at the end of this document.
5
10/17
FPGA/CPLD
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