MIC5010
Micrel
MIC5010
Full-Featured High- or Low-Side MOSFET Driver
Not Recommended for New Designs
General Description
The MIC5010 is the full-featured member of the Micrel
MIC501X driver family. These ICs are designed to drive the
gate of an N-channel power MOSFET above the supply rail
in high-side power switch applications. The MIC5010 is
compatible with standard or current-sensing power FETs in
both high- and low-side driver topologies.
The MIC5010 charges a 1nF load in 60µs typical and
protects the MOSFET from over-current conditions. Faster
switching is achieved by adding two 1nF charge pump
capacitors. The current sense trip point is fully program-
mable and a dynamic threshold allows high in-rush current
loads to be started. A fault pin indicates when the MIC5010
has turned off the FET due to excessive current.
Other members of the Micrel driver family include the
MIC5011 minimum parts count 8 pin driver, MIC5012 dual
driver, and MIC5013 protected 8 pin driver.
Features
• 7V to 32V operation
• Less than 1µA standby current in the “OFF” state
• Internal charge pump to drive the gate of an N-channel
power FET above supply
• Available in small outline SOIC packages
• Internal zener clamp for gate protection
• 25µs typical turn-on time to 50% gate overdrive
• Programmable over-current sensing
• Dynamic current threshold for high in-rush loads
• Fault output pin indicates current faults
• Implements high- or low-side switches
Applications
•
•
•
•
•
•
Lamp drivers
Relay and solenoid drivers
Heater switching
Power bus switching
Motion control
Half or full H-bridge drivers
Typical Application
Ordering Information
Part Number
MIC5010BN
MIC5010BM
Temperature Range
–40°C to +85°C
–40°C to +85°C
Package
14-pin Plastic DIP
14-pin SOIC
MIC5010
1 Inhibit
2 NC
Control Input
R
TH
20kΩ
3 Input
4 Thresh
5 Sense
6 Source
7 Gnd
Fault 14
V+ 13
NC
12
C1 11
Com 10
C2 9
Gate 8
V+ =24V
+
10µF
R =
S
SR( V
TRIP
+100mV)
+100mV)
R I
L
– ( V
TRIP
IRCZ44
(S=2590,
R=11mΩ)
SENSE
R1=
V+SRR
S
100mV (SR+R
S
)
R
S
43Ω
SOURCE
R
TH
=
2200
V
TRIP
–1000
LOAD
Note: The MIC5010 is ESD sensitive.
KELVIN
R1
4.3kΩ
For this example:
I
L
=30A (trip current)
V
TRIP
=100mV
Figure 1. High-Side Driver with
Current-Sensing MOSFET
Protected under one or more of the following Micrel patents:
patent #4,951,101; patent #4,914,546
April 1998
5-87
MIC5010
Micrel
Absolute Maximum Ratings
(Note 1, 2)
Inhibit Voltage, Pin 1
Input Voltage, Pin 3
Threshold Voltage, Pin 4
Sense Voltage, Pin 5
Source Voltage, Pin 6
Current into Pin 6
Gate Voltage, Pin 8
Supply Voltage (V
+
), Pin 13
Fault Output Current, Pin 14
Junction Temperature
–1V to V+
–10V to V+
– 0.5 to +5V
–10V to V+
–10V to V+
50 mA
–1V to 50V
–0.5V to 36V
–1mA to +1mA
150°C
Operating Ratings
(Notes 1, 2)
Power Dissipation
θ
JA
(Plastic DIP)
θ
JA
(SOIC)
Ambient Temperature: B version
Storage Temperature
Lead Temperature
(Soldering, 10 seconds)
Supply Voltage (V
+
), Pin 13
1.56W
80
°C/W
115°C/W
–40°C to +85°C
–65°C to +150°C
260°C
7V to 32V high side
7V to 15V low side
Pin Description
(Refer to Figures 1 and 2)
Pin Number
1
3
4
Pin Name
Inhibit
Input
Threshold
Pin Function
Inhibits current sense function when connected to supply. Normally
grounded.
Resets current sense latch and turns on power MOSFET when taken above
threshold (3.5V typical). Pin 3 requires <1µA to switch.
Sets current sense trip voltage according to:
V
TRIP
=
2200
R
TH
+1000
where R
TH
to ground is 3.3k to 20kΩ. Adding capacitor C
TH
increases the
trip voltage at turn-on to 2V. Use C
TH
=10µF for a 10mS turn-on time
constant.
5
Sense
The sense pin causes the current sense to trip when V
SENSE
is V
TRIP
above
V
SOURCE
. Pin 5 is used in conjunction with a current shunt in the source of
a 3 lead FET or a resistor R
S
in the sense lead of a current sensing FET.
Reference for the current sense voltage on pin 5 and return for the gate
clamp zener. Connect to the load side of current shunt or kelvin lead of
current sensing FET. Pins 5 and 6 can safely swing to –10V when turning
off inductive loads.
6
Source
7
8
9, 10, 11
13
14
Ground
Gate
C2, Com, C1
V
+
Fault
Drives and clamps the gate of the power FET. Pin 8 will be clamped to
approximately –0.7V by an internal diode when turning off inductive loads.
Optional 1nF capacitors reduce gate turn-on time; C2 has dominant effect.
Supply pin; must be decoupled to isolate from large transients caused by
the power FET drain. 10µF is recommended close to pins 13 and 7.
Outputs status of protection circuit when pin 3 is high. Fault low indicates
normal operation; fault high indicates current sense tripped.
Pin Configuration
MIC5010
1
2
3
4
5
6
7
Inhibit Fault
NC
Input
Thresh
V+
NC
C1
14
13
12
11
10
9
8
Sense Com
Source
Gnd
C2
Gate
5-88
April 1998
MIC5010
Micrel
Electrical Characteristics
(Note 3) Test circuit. T
A
= –55°C to +125°C, V
+
= 15V, V
1
= 0 V, I
4
=
I
5
= I
14
= 0, all
switches open, unless otherwise specified.
Parameter
Supply Current, I
13
Logic Input Voltage, V
IN
Conditions
V
+
= 32V
V
IN
= 0V, S4 closed
V
IN
= V
S
= 32V, I
4
= 200µA
V
+
= 4.75V
Adjust V
IN
for V
GATE
low
Adjust V
IN
for V
GATE
high
V
+
= 15V
Logic Input Current, I
3
Input Capacitance
Gate Drive, V
GATE
Zener Clamp,
V
GATE
– V
SOURCE
Gate Turn-on Time, t
ON
(Note 4)
Gate Turn-off Time, t
OFF
Threshold Bias Voltage, V
4
Current Sense Trip Voltage,
V
SENSE
– V
SOURCE
V+ = 32V
Adjust V
IN
for V
GATE
high
V
IN
= 0V
V
IN
= 32V
Pin 3
S1, S2 closed,
V
S
= V+, V
IN
= 5V
S2 closed, V
IN
= 5V
V
+
= 7V, I
8
= 0
V
+
= 15V, I
8
= 100
µA
V+ = 15V, V
S
= 15V
V
+
= 32V, V
S
= 32V
V
IN
switched from 0 to 5V; measure time
for V
GATE
to reach 20V
V
IN
switched from 5 to 0V; measure time
for V
GATE
to reach 1V
I
4
= 200
µA
S2 closed, V
IN
= 5V,
Increase I
5
V
+
= 7V,
I
4
= 100
µA
V
+
= 15V
I
4
= 200
µA
V
+
= 32V
I
4
= 500
µA
Peak Current Trip Voltage,
V
SENSE
– V
SOURCE
Fault Output Voltage, V
14
Current Sense Inhibit, V
1
S3, S4 closed,
V
+
= 15V, V
IN
= 5V
V
IN
= 0V, I
14
= –100
µA
V
IN
= 5V, I
14
= 100
µA,
current sense tripped
V
1
above which current sense is disabled
Minimum possible V
1
Note 1
Note 2
Note 3
Note 4
Min
Typical
0.1
8
Max
10
20
2
Units
µA
mA
V
V
V
µA
µA
pF
V
V
4.5
5.0
–1
1
5
13
24
11
11
15
27
12.5
13
25
4
1.7
2
105
100
210
200
520
500
2.1
0.4
14
14.6
7.5
1
13
1
15
16
50
10
2.2
135
130
270
260
680
650
V
V
µs
µs
V
mV
mV
mV
mV
mV
mV
V
V
V
V
V
S4 closed
V
S
= 4.9V
S4 closed
V
S
= 11.8V
V
S
= 0V
V
S
= 25.5V
75
70
150
140
360
350
1.6
Absolute Maximum Ratings
indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its specified
Operating Ratings.
The MIC5010 is ESD sensitive.
Minimum and maximum
Electrical Characteristics
are 100% tested at T
A
= 25°C and T
A
= 85°C, and 100% guaranteed over the entire
range. Typicals are characterized at 25°C and represent the most likely parametric norm.
Test conditions reflect worst case high-side driver performance. Low-side and bootstrapped topologies are significantly faster—see
Applications Information.
April 1998
5-89
MIC5010
Micrel
Test Circuit
V+
+ 1µF
I5
V1
1
2
3
V3
50Ω
4
5
6
S3 I4
S4
S2
VS
500Ω
1W
3.5k
7
MIC5010
Inhibit Fault
NC
Input
Thresh
V+
NC
C1
14
13
12
11
10
9
8
1nF
S1
I8
1nF
1nF
I14
Sense Com
Source
Gnd
C2
Gate
Typical Characteristics
Supply Current
12
DC Gate Voltage
above Supply
14
12
SUPPLY CURRENT (mA)
VGATE – V+ (V)
10
8
6
4
2
0
10
8
6
4
2
0
0
5
10
15
20
25
30
35
0
3
6
9
12
15
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
5-90
April 1998
MIC5010
Micrel
Typical Characteristics
(Continued)
High-side Turn-on Time*
350
140
High-side Turn-on Time*
120
100
80
60
40
20
CGATE =1 nF
C2=1 nF
TURN-ON TIME (µS)
250
200
150
100
50
0
0
3
6
CGATE =1 nF
TURN-ON TIME (µS)
15
300
9
12
0
0
3
6
9
12
15
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
High-side Turn-on Time*
3.5
High-side Turn-on Time*
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
3
6
9
12
15
CGATE =10 nF
C2=1 nF
TURN-ON TIME (mS)
2.5
2.0
1.5
1.0
0.5
0
0
3
6
CGATE =10 nF
9
12
15
TURN-ON TIME (mS)
3.0
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
CHARGE-PUMP CURRENT (mA)
CHARGE-PUMP CURRENT (µA)
Charge Pump
Output Current
250
VGATE =V+
200
150
VGATE =V++5V
100
50
VS=V +–5V
0
0
5
10
15
20
25
30
Charge Pump
Output Current
1.0
0.8
0.6
0.4
0.2
0
0
5
10
C2=1 nF
VS=V +–5V
15
20
25
30
VGATE =V +
+5V
VGATE =V+
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
* Time for gate to reach V
+
+ 5V in test circuit with VS = V
+
– 5V (prevents gate clamp from interfering with measurement).
April 1998
5-91
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