Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed.
Electrical Characteristics
VCC = 5V for MIC81-L/M/J, VCC = 3.3V for MIC81-S/T, VCC = 3V for MIC81-R, T
A
= Operating Temperature Range, unless
otherwise noted.
Parameter
Operating Voltage Range, VCC
Supply Current, ICC
Reset Voltage Threshold, VTH
Conditions
TA = 0°C to 70°C
TA = -40°C to 85°C
MIC811L/M/J, MIC812L/M/J
VCC < 3.6V, MIC811R/S/T, MIC812R/S/T
MIC811L, MIC812L
MIC811M, MIC812M
MIC811J, MIC812J
MIC811T, MIC812T
MIC811S, MIC812S
MIC811R, MIC812R
4.50
4.25
3.89
3.00
2.85
2.55
140
ISource = 800µA, MIC811L/M/J
ISource = 500µA, MIC811R/S/T
VCC=VTH Min., ISink=3.2mA, MIC811L/M/J
VCC=VTH Min., ISink =1.2mA, MIC811R/S/T
VCC>1.4V, ISink =50µA, TA = 0°C to 70°C
VCC>1.6V, ISink =50µA, TA = -40°C to 85°C
1.8V < VCC < VTH Min.,
ISource = 150µA
ISink=3.2mA, MIC812L/M/J
ISink=1.2mA, MIC812R/S/T
10
0.5
VCC > VTH Max., MIC81_L/M/J
MIC81_R/S/T
VCC > VTH Max., MIC81_L/M_
MIC81_R/S/T
10
20
100
2.3
0.7 X VCC
0.8
0.25 X VCC
30
0.8 X VCC
0.4
0.3
VCC - 1.5V
0.8 X VCC
0.4
0.3
0.3
0.3
Min
1.4
1.6
9
6
4.63
4.38
4.00
3.08
2.93
2.63
240
Typ
Max
5.5
5.5
15
10
4.75
4.50
4.10
3.15
3.00
2.70
560
Units
V
µA
V
Reset Timeout Period
RESET Output Voltage, VOH
RESET Output Voltage, VOL
ms
V
V
RESET Output Voltage, VOH
RESET Output Voltage, VOL
MR Minimum Pulse Width
MR to Reset Delay
MR Input Threshold, VIH
MR Input Threshold, VIL
MR Pull-Up Resistance
MR Glitch Immunity
V
V
µs
µs
V
V
kΩ
ns
2
MIC811/MIC812 Microprocessor Reset Circuits
Pin Functions
Pin No.
Pin Name
GND
RESET
MIC811
1
2
MIC812
1
N/A
Description
IC Ground Pin.
RESET goes low if VCC falls below the reset threshold and remains
asserted for one reset timeout period (140ms min.) after VCC exceeds
the reset threshold.
RESET goes high if VCC falls below the reset threshold and remains
asserted for one reset timeout period (140ms min.) after VCC exceeds
the reset threshold.
Manual reset input. A logic low on MR forces a reset. The reset will
remain asserted as long as MR is held low and for one reset timeout
period (140ms min.) after MR goes high. This input can be shorted to
ground via a switch or driven from CMOS or TTL logic. Float if unused.
Power supply input, 3V, 3.3V or 5V.
RESET
N/A
2
MR
3
3
VCC
4
4
3
MIC811/MIC812 Microprocessor Reset Circuits
Block Diagram
VCC (4)
Reset
Threshold (V)
+
-
RESET
GENERATOR
RESET (2)
RESET (MIC812)
MR (3)
GND (1)
Figure 1. MIC811/812 Block Diagram
4
MIC811/MIC812 Microprocessor Reset Circuits
Circuit Description
Microprocessor Reset
The RESET pin is asserted whenever VCC falls below
the reset threshold voltage or if MR (manual reset) is
forced low. The reset pin remains asserted for a period
of 240ms after VCC has risen above the reset threshold
voltage or MR has returned high. The reset function
ensures the microprocessor is properly reset and powers
up into a known condition after a power failure. RESET
will remain valid with VCC as low as 1.4V.
VCC Transients
The MIC811/MIC812 are relatively immune to negative-
going VCC glitches below the reset threshold. Typically,
a negative-going transient 125mV below the reset
threshold with a duration of 50µs (25µs for
MIC81_R/S/T) or less will not cause an unwanted reset.
Interfacing to Bidirectional Reset Pins
The MIC811/MIC812 can interface with
µPs
with
bidirectional reset pins by connecting a 4.7KΩ resistor in
series with the MIC811/MIC812 output and the
µP
reset
pin.
VCC
Vthr
MR
t1
RESET
t1
Figure 2. Reset Timing Diagram
VCC
VCC
VCC
µP
RESET
100K
MIC811
RESET
RESET Valid to 0V
A resistor can be added from the RESET pin to ground
to ensure the RESET output remains low with V CC
down to 0V. A 100KΩ resistor connected from RESET
to ground is recommended. The size of the resistor
should be large enough to not load the RESET output
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