19-5960; Rev 0; 6/11
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
Integrated 70W High-Power MOSFET
General Description
The MAX5982A/MAX5982B/MAX5982C provide a com-
plete interface for a powered device (PD) to comply with
the IEEE
®
802.3af/at standard in a power-over-Ethernet
(PoE) system. The MAX5982A/MAX5982B/MAX5982C
provide the PD with a detection signature, classifica-
tion signature, and an integrated isolation power switch
with inrush current control. During the inrush period,
the MAX5982A/MAX5982B/MAX5982C limit the current
to less than 182mA before switching to the higher cur-
rent limit (1700mA to 2100mA) when the isolation power
MOSFET is fully enhanced. The devices feature an input
UVLO with wide hysteresis and long deglitch time to
compensate for twisted-pair cable resistive drop and to
assure glitch-free transition during power-on/-off condi-
tions. The MAX5982A/MAX5982B/MAX5982C can with-
stand up to 100V at the input.
The MAX5982A/MAX5982B/MAX5982C support a
2-Event classification method as specified in the IEEE
802.3at standard and provide a signal to indicate when
probed by a Type 2 power sourcing equipment (PSE).
The devices detect the presence of a wall adapter power
source connection and allow a smooth switchover from
the PoE power source to the wall power adapter.
The MAX5982A/MAX5982B/MAX5982C also provide a
power-good (PG) signal, two-step current limit and fold-
back, overtemperature protection, and di/dt limit. A sleep
mode feature in the MAX5982A/MAX5982B provides low
power consumption while supporting Maintain Power
Signature (MPS). An ultra-low-power sleep mode feature
in the MAX5982A/MAX5982B further reduces power
consumption while still supporting MPS. The MAX5982A/
MAX5982B also feature an LED driver that is automati-
cally activated during sleep mode.
The MAX5982A/MAX5982B/MAX5982C are available in
a 16-pin, 5mm x 5mm, TQFN power package. These
devices are rated over the -40NC to +85NC extended
temperature range.
Features
S
Sleep Mode and Ultra-Low-Power Sleep
(MAX5982A/MAX5982B)
S
IEEE 802.3af/at Compliant
S
2-Event Classification or an External Wall Adapter
Indicator Output
S
Simplified Wall Adapter Interface
S
PoE Classification 0–5
S
100V Input Absolute Maximum Rating
S
Inrush Current Limit of 182mA Maximum
S
Current Limit During Normal Operation Between
1700mA and 2100mA
S
Current Limit and Foldback
S
Legacy UVLO at 36V
S
LED Driver with Programmable LED Current
(MAX5982A/MAX5982B)
S
Overtemperature Protection
S
Thermally Enhanced, 5mm x 5mm, 16-Pin TQFN
MAX5982A/MAX5982B/MAX5982C
Applications
IEEE 802.3af/at Powered Devices
IP Phones, Wireless Access Nodes, IP Security
Cameras
WiMAXK Base Stations
Ordering Information
appears at end of data sheet.
WiMAX is a trademark of WiMAX Forum.
IEEE is a registered service mark of the Institute of Electrical
and Electronics Engineers, Inc.
_______________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
ABSOLUTE MAXIMUM RATINGS
V
DD
to V
SS
..........................................................-0.3V to +100V
DET, RTN, WAD, PG,
2EC
to V
SS
....................... -0.3V to +100V
CLS,
SL, WK, ULP,
LED to V
SS
...............................-0.3V to +6V
Maximum Current on CLS (100ms maximum) .................100mA
Continuous Power Dissipation (T
A
= +70NC) (Note 1)
TQFN (derate 28.6mW/NC above +70NC)
Multilayer Board .....................................................2285.7mW
Operating Temperature Range .......................... -40NC to +85NC
Maximum Junction Temperature.....................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) .............................. +300NC
Soldering Temperature (reflow) .................................... +260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note 1:
Maximum power dissipation is obtained using JEDEC JESD51-5 and JESD51-7 specifications.
PACKAGE THERMAL CHARACTERISTICS(Note 2)
TQFN
Junction-to-Ambient Thermal Resistance (q
JA
) ..........35°C/W
Junction-to-Case Thermal Resistance (
B
JC
) ..............2.7NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
IN
= (V
DD
- V
SS
) = 48V, R
DET
= 24.9kω, R
CLS
= 615ω, and R
SL
= 60.4kω. RTN, WAD, PG,
2EC, WK,
and
ULP
unconnected, all
voltages are referenced to V
SS,
unless otherwise noted. T
A
= T
J
= -40
N
C to +85
N
C, unless otherwise noted. Typical values are at
T
A
= +25
N
C.) (Note 3)
PARAMETER
DETECTION MODE
Input Offset Current
Effective Differential Input
Resistance
CLASSIFICATION MODE
Classification Disable
Threshold
Classification Stability Time
Class 0, R
CLS
= 615I
V
IN
= 12.5V to
20.5V, V
DD
=
RTN = WAD =
PG =
2EC
Class 1, R
CLS
= 117I
Class 2, R
CLS
= 66.5I
Class 3, R
CLS
= 43.7I
Class 4, R
CLS
= 30.9I
Class 5, R
CLS
= 21.3I
TYPE 2 (802.3at) CLASSIFICATION MODE
Mark Event Threshold
Hysteresis on Mark Event
Threshold
Mark Event Current
Reset Event Threshold
2
I
MARK
V
THR
V
IN
falling to enter mark event, 5.2V
P
V
IN
P
10.1V
V
IN
falling
0.25
2.8
3.8
V
THM
V
IN
falling
10.1
10.7
0.82
0.85
5.2
11.6
V
V
mA
V
0
9.12
17.2
26.3
36.4
52.7
V
TH,CLS
V
IN
rising (Note 6)
22.0
22.8
0.2
3.96
11.88
19.8
29.7
43.6
63.3
mA
23.6
V
ms
I
OFFSET
dR
V
IN
= 1.4V to 10.1V (Note 4)
V
IN
= 1.4V up to 10.1V with 1V step,
V
DD
= RTN = WAD = PG =
2EC
(Note 5)
23.95
25.00
10
25.50
FA
kI
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Classification Current
I
CLASS
______________________________________________________________________________________
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
Integrated 70W High-Power MOSFET
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= (V
DD
- V
SS
) = 48V, R
DET
= 24.9kω, R
CLS
= 615ω, and R
SL
= 60.4kω. RTN, WAD, PG,
2EC, WK,
and
ULP
unconnected, all
voltages are referenced to V
SS,
unless otherwise noted. T
A
= T
J
= -40
N
C to +85
N
C, unless otherwise noted. Typical values are at
T
A
= +25
N
C.) (Note 3)
PARAMETER
POWER MODE
V
IN
Supply Voltage Range
V
IN
Supply Current
V
IN
Turn-On Voltage
V
IN
Turn-Off Voltage
V
IN
Turn-On/-Off Hysteresis
V
IN
Deglitch Time
Inrush to Operating Mode
Delay
Isolation Power MOSFET
On-Resistance
RTN Leakage Current
CURRENT LIMIT
Inrush Current Limit
Current Limit During Normal
Operation
Current Limit in Foldback
Condition
Foldback Threshold
LOGIC
WAD Detection Threshold
WAD Detection Threshold
Hysteresis
WAD Input Current
2EC
Sink Current
2EC
Off-Leakage Current
PG Sink Current
PG Off-Leakage Current
SLEEP MODE (MAX5982A/MAX5982B)
WK
and
ULP
Logic Threshold
SL
Logic Threshold
SL
Current
LED Current Amplitude
I
LED
V
TH
V
WK
falling and V
ULP
rising and falling
Falling
R
SL
= 0I
R
SL
= 60.4kI, V
LED
= 3.5V
R
SL
= 30.2kI, V
LED
= 3.75V
R
SL
= 30.2kI, V
LED
= 4V
10
19.5
19
1.5
0.75
0.8
140
10.5
20.9
11.5
22.5
mA
3
0.85
V
V
FA
I
WAD-LKG
V
WAD-REF
V
WAD
rising, V
IN
= 14V to 48V
(referenced to RTN)
V
WAD
falling, V
RTN
= 0V, V
SS
unconnected
V
WAD
= 10V (referenced to RTN)
V
2EC
= 3.5V (referenced to RTN),
V
SS
disconnected
V
2EC
= 48V
V
RTN
= 1.5V, V
PG
= 0.8V, during inrush
period
V
PG
= 60V
125
230
1
1.5
8
9
0.35
3.5
2.25
1
375
1
10
V
V
FA
mA
FA
FA
FA
I
INRUSH
I
LIM
I
LIM-FLDBK
During initial turn-on period, V
RTN
= 1.5V
After inrush completed,
V
RTN
= 1V (Note 9)
Both during inrush and after inrush
completed V
RTN
= 7.5V
V
RTN
(Note 10)
6.5
90
1700
135
1900
53
7.0
7.5
182
2100
mA
mA
mA
V
I
Q
V
ON
V
OFF
V
HYST_UVLO
t
OFF_DLY
t
DELAY
R
ON_ISO
I
RTN_LKG
Current through internal MOSFET = 0
V
IN
rising
V
IN
falling
(Note 7)
V
IN
falling from 40V to 20V (Note 8)
t
DELAY
= minimum PG current pulse width
after entering into power mode
T
J
= +25NC
I
RTN
= 950mA
T
J
= +85NC
T
J
= +125NC
V
RTN
= 12.5V to 30V
34.3
30
4.2
30
90
120
96
0.1
0.15
0.2
10
FA
102
0.2
0.25
I
0.25
35.4
60
0.55
36.6
V
mA
V
V
V
Fs
ms
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5982A/MAX5982B/MAX5982C
_______________________________________________________________________________________
3
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= (V
DD
- V
SS
) = 48V, R
DET
= 24.9kω, R
CLS
= 615ω, and R
SL
= 60.4kω. RTN, WAD, PG,
2EC, WK,
and
ULP
unconnected, all
voltages are referenced to V
SS,
unless otherwise noted. T
A
= T
J
= -40
N
C to +85
N
C, unless otherwise noted. Typical values are at
T
A
= +25
N
C.) (Note 3)
PARAMETER
LED Current Programmable
Range
LED Current with Grounded
SL
LED Current Frequency
LED Current Duty Cycle
V
DD
Current Amplitude
Internal Current Duty Cycle
Internal Current Enable Time
Internal Current Disable Time
SL
Delay Time
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
Note
Note
Note
Note
Note
Note
3:
4:
5:
6:
7:
8:
T
SD
T
J
rising
T
J
falling
+150
30
NC
NC
f
ILED
D
ILED
I
VDD
D
IVDD
t
MPS
t
MPDO
t
SL
V
SL
= 0V
Normal and ultra-low-power sleep modes
Normal and ultra-low-power sleep modes
Normal sleep mode, V
LED
= 3.5V
Normal and ultra-low-power sleep modes
Ultra-low-power sleep mode
Ultra-low-power sleep mode
Time V
SL
must remain below the
SL
logic
threshold to enter sleep and ultra-low-
power modes (MAX5982A)
80
220
5.4
10
SYMBOL
CONDITIONS
MIN
10
20.5
24.5
250
25
11
75
84
228
6.0
88
236
6.6
12.2
TYP
MAX
20
28.5
UNITS
mA
mA
Hz
%
mA
%
ms
ms
s
All devices are 100% production tested at T
A
= +25NC. Limits over temperature are guaranteed by design.
The input offset current is illustrated in Figure 1.
Effective differential input resistance is defined as the differential resistance between V
DD
and V
SS
. See Figure 1.
Classification current is turned off whenever the device is in power mode.
UVLO hysteresis is guaranteed by design, not production tested.
A 20V glitch on input voltage, which takes V
DD
below V
ON
shorter than or equal to t
OFF_DLY
does not cause the
MAX5982A/MAX5982B/MAX5982C to exit power-on mode.
Note 9:
Maximum current limit during normal operation is guaranteed by design; not production tested.
Note 10:
In power mode, current-limit foldback is used to reduce the power dissipation in the isolation MOSFET during an
overload condition across V
DD
and RTN.
I
IN
dR
i
=
1V
(V
INi + 1
- V
INi
)
=
(I
INi + 1
- I
INi
) (I
INi + 1
- I
INi
)
V
INi
dR
i
I
OFFSET
= I
INi
-
I
INi + 1
I
INi
dR
i
I
OFFSET
V
INi
1V
V
INi + 1
V
IN
Figure 1. Effective Differential Input Resistance/Offset Current
4
______________________________________________________________________________________
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
Integrated 70W High-Power MOSFET
Typical Operating Characteristics
(V
IN
= (V
DD
- V
SS
) = 54V, R
DET
= 24.9kω, R
CLS
= 615ω, and R
SL
= 60.4kω. RTN, WAD, PG,
2EC, WK,
and
ULP
unconnected; all
voltages are referenced to V
SS.
)
DETECTION CURRENT
vs. INPUT VOLTAGE
MAX5982A toc01
MAX5982A/MAX5982B/MAX5982C
SIGNATURE RESISTANCE
vs. INPUT VOLTAGE
I
IN
= I
VDD
+ I
DET
R
DET
= 25.4kI
RTN = 2EC = PG = WAD = V
DD
T
A
= -40°C
25.0
MAX5982A toc02
INPUT OFFSET CURRENT
vs. INPUT VOLTAGE
4
INPUT OFFSET CURRENT (µA)
3
2
1
0
-1
-2
-3
-4
-5
T
A
= +25°C
T
A
= -40°C
T
A
= +85°C
MAX5982A toc03
0.5
0.4
0.3
0.2
0.1
0
0
2
4
V
IN
(V)
6
8
I
IN
= I
VDD
+ I
DET
R
DET
= 25.4kI
RTN = 2EC = PG = WAD = V
DD
26.0
5
25.5
R
SIGNATURE
(kI)
I
IN
(mA)
24.5
T
A
= +85°C
T
A
= +25°C
24.0
10
0
2
4
V
IN
(V)
6
8
10
0
2
4
V
IN
(V)
6
8
10
CLASSIFICATION CURRENT
vs. INPUT VOLTAGE
MAX5982A toc04
CLASSIFICATION SETTLING TIME
MAX5982A toc05
2EC SINK CURRENT vs. 2EC VOLTAGE
T
A
= -40°C
V
IN
5V/div
I
2EC
(mA)
I
IN
100mA/div
1.6
1.2
0.8
0.4
0
0
10
20
30
V
2EC
(V)
40
50
60
T
A
= +85°C
T
A
= +25°C
MAX5982A toc06
70
60
50
I
IN
(mA)
40
30
20
10
0
0
5
10
15
V
IN
(V)
20
25
CLASS 4
CLASS 3
CLASS 2
CLASS 1
CLASS 0
CLASS 5
2.0
STEP INPUT APPLIED TO
V
IN
FROM 10V TO 12V
30
100µs/div
V
CLS
2V/div
PG SINK CURRENT vs. PG VOLTAGE
T
A
= -40°C
250
200
150
100
50
0
10
20
30
V
PG
(V)
40
50
60
T
A
= +85°C
T
A
= +25°C
MAX5982A toc07
INRUSH CURRENT LIMIT
vs. RTN VOLTAGE
0.14
INRUSH CURRENT LIMIT (A)
0.12
0.10
0.08
0.06
0.04
0.02
0
0
10
20
30
V
RTN
(V)
40
50
60
0
0
MAX5982A toc08
NORMAL OPERATION CURRENT LIMIT
vs. RTN VOLTAGE
MAX5982A toc09
300
0.16
2.5
2.0
CURRENT LIMIT (A)
1.5
1.0
0.5
I
PG
(µA)
10
20
30
V
RTN
(V)
40
50
60
_______________________________________________________________________________________
5
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
