CY2907
Single-PLL General Purpose EPROM
Programmable Clock Generator
Single-PLL General Purpose EPROM Programmable Clock Generator
Features
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Benefits
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Single phase locked loop (PLL) architecture
EPROM programmability
Factory programmable (CY2907) or field programmable
(CY2907F) device options
Up to two configurable outputs
Low skew, low jitter, high accuracy outputs
Power management (power-down, OE)
Frequency select option
Configurable 5 V or 3.3 V Operation
8-pin SOIC package
Generates a custom frequency from an external source
Easy customization and fast turnaround
Programming support available for all opportunities
Provides clocking requirements from a single device
Meets critical industry standard timing requirements
Supports low power applications
Up to 16 user selectable frequencies
Supports industry standard design platforms
Industry standard packaging saves on board space
Functional Description
For a complete list of related documentation, click
here.
Logic Block Diagram
REFCLK
XTALIN
OSC
XTALOUT
EPROM
Table
S0
S1
Configuration
EPROM
and Test Logic
PLL
Output
Multiplexer
and
Dividers
CLKA
Cypress Semiconductor Corporation
Document Number: 38-07137 Rev. *J
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised July 22, 2016
CY2907
Contents
Pin Configurations ........................................................... 3
Pin Description ................................................................. 3
Functional Overview ........................................................ 4
Device Programming ........................................................ 4
CyberClocks™ Software .................................................. 4
Cypress CY3670 Programming Kit ................................. 4
Maximum Ratings ............................................................. 5
Operating Conditions ....................................................... 5
Electrical Characteristics ................................................. 6
Electrical Characteristics ................................................. 6
Switching Characteristics ................................................ 7
Switching Characteristics ................................................ 8
Switching Waveforms ...................................................... 9
Test Circuit ........................................................................ 9
Ordering Information ...................................................... 10
Ordering Code Definitions ......................................... 10
Package Characteristics ................................................ 10
Package Diagrams .......................................................... 11
Acronyms ........................................................................ 12
Document Conventions ................................................. 12
Units of Measure ....................................................... 12
Document History Page ................................................. 13
Sales, Solutions, and Legal Information ...................... 14
Worldwide Sales and Design Support ....................... 14
Products .................................................................... 14
PSoC®Solutions ....................................................... 14
Cypress Developer Community ................................. 14
Technical Support ..................................................... 14
Document Number: 38-07137 Rev. *J
Page 2 of 14
CY2907
Pin Configurations
Figure 1. 8-pin SOIC pinout (Top View)
S0
REFCLK
V
DD
CLKA
OEA
OER
XTALOUT
S0
V
SS
XTALIN
XTALOUT
1
2
3
4
8
7
6
5
REFCLK
V
DD
CLKA
S1
Pin Description
Name
Pin Number
8-pin SOIC
Description
S1
V
SS
XTALIN
[1]
XTALOUT
[1, 2]
CLKA
V
DD
REFCLK
S0
5
2
3
4
6
7
8
1
Frequency select (CLKA) (internal pull-up resistor to V
DD
)
Ground
Reference crystal input
Reference crystal feedback
Clock output
Voltage supply
Reference clock output (default, can be driven by PLL if desired)
Frequency select (CLKA) (internal pull-up resistor to V
DD
)
Notes
1. For best accuracy, use a parallel resonant crystal, C
LOAD
17 pF.
2. Float XTALOUT pin if XTALIN is driven by reference clock (as opposed to crystal).
Document Number: 38-07137 Rev. *J
Page 3 of 14
CY2907
Functional Overview
The CY2907 is a general purpose clock generator designed for
use in a wide variety of applications — from graphics to PC
peripherals to disk drives. It generates selectable system clock
frequencies from a single reference input (crystal or reference
clock). The CY2907 is configured with an EPROM array, similar
to the other devices in the Cypress EPROM Programmable
Clock family, making it easy to customize for any application.
Furthermore, the CY2907 is compatible with all industry standard
9107 and 9108 clock synthesizers.
CyberClocks™ Software
CyberClocks is an easy-to-use software application that enables
the user to configure any one of the EPROM Programmable
Clocks offered by Cypress. You may specify the input frequency,
PLL and output frequencies, and different functional options.
Note the output frequency ranges in this data sheet when
specifying them in CyberClocks to make sure that you stay within
the limits. After a configuration is established, you can print the
configuration and save programming files in ENT and JED
formats.
CyberClocks runs on PCs running the Windows
™
operating
system, and is available for free download on the Cypress
Semiconductor website at
www.cypress.com.
Within the CyberClocks application, the CY2907 is found in the
CyClocks
™
section. Note that the standalone CyberClocks
software should not be confused with the CyberClocks Online
software, which is a web-based application that is used to
configure other programmable clock devices.
Device Programming
Two versions of the CY2907 are available - Field Programmable
and Factory Programmable. Field programmable devices must
be programmed before being installed in an application. They
are one-time-programmable (OTP). Customers can program
small quantities in-house using the Cypress CY3670
programmer. Production quantities are available through
Cypress’s value-added distribution partners, or by using third
party programmers from BP Microsystems, Hi-Lo Systems, and
others.
For high volume orders, devices can be factory programmed by
Cypress. All requests must be submitted to the local Cypress
Field Application Engineer (FAE) or sales representative. After
the request is processed, you receive a new part number,
samples, and a data sheet with the programmed values. This
part number is used for additional sample requests and
production orders.
Cypress CY3670 Programming Kit
Cypress’s CY3670 is a portable programmer that connects to a
PC serial port and enables users of CyClocks software to quickly
and easily program any of the CY2291F, CY2292F, CY2071AF,
and CY2907F devices. An adapter is also required and is
ordered separately. The CY3097 is the adapter for the
CY2907F8.
Document Number: 38-07137 Rev. *J
Page 4 of 14
CY2907
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Supply voltage ................................................ –0.5 to +7.0 V
Input voltage ....................................... –0.5 V to V
DD
+ 0.5 V
Storage temperature
(non-condensing) ..................................... –65 °C to +150 °C
Max soldering temperature (10 sec) ....................... +260 °C
Junction temperature .............................................. +150 °C
Static discharge voltage
(per MIL-STD-883, method 3015) .......................... > 2000 V
Operating Conditions
Parameter
[3]
Description
Min
Max
Unit
V
DD
T
A
C
L
f
REF
Supply voltage, 5 V operation
Supply voltage, 3.3 V operation
Commercial operating temperature, Ambient
Maximum capacitive load
External reference crystal
External reference clock
[4, 5]
4.5
3.0
0
–
10.0
1.0
5.5
3.6
70
15
25.0
30.0
V
V
°C
pF
MHz
MHz
Notes
3. Electrical parameters are guaranteed with these operating conditions.
4. Guaranteed by design, not 100% tested in production.
5. Load = max typical configuration, f
REF
= 14.318 MHz. Specific configurations may vary. A close approximation of I
DD
can be derived by the following formula:
I
DD
(mA) = V
DD
× (6.25 + (0.055 × F
REF
) + (0.0017 × C
LOAD
× (F
CLKA
+ REFCLK))). C
LOAD
is specified in pF and F is specified in MHz.
:
Document Number: 38-07137 Rev. *J
Page 5 of 14
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