DATA SHEET
Integrated
ICS8535-31
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-
RYSTAL
O
SCILLATOR
/
Circuit
L
OW
S
KEW
, 1-
TO
-4, C
Systems, Inc.
TO-3.3V LVPECL FANOUT BUFFER
LVCMOS-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
ICS8535-31
G
ENERAL
D
ESCRIPTION
The ICS8535-31 is a low skew, high performance
1-to-4 3.3V Crystal Oscillator/LVCMOS-to-3.3V
HiPerClockS™
LVPECL fanout buffer and a member of the
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS8535-31 has select-
able single ended clock or crystal inputs. The single ended
clock input accepts LVCMOS or LVTTL input levels and
translate them to 3.3V LVPECL levels. The output enable is
internally synchronized to eliminate runt pulses on the out-
puts during asynchronous assertion/deassertion of the clock
enable pin.
F
EATURES
•
4 differential 3.3V LVPECL outputs
•
Selectable LVCMOS/LVTTL CLK or crystal inputs
•
CLK can accept the following input levels: LVCMOS, LVTTL
•
Maximum output frequency: 266MHz
•
Output skew: 30ps (maximum)
•
Part-to-part skew: 200ps (maximum)
•
Propagation delay: 1.65ns (maximum)
•
Additive phase jitter, RMS: 0.057ps (typical)
•
3.3V operating supply
•
0°C to 70°C ambient operating temperature
•
Lead-Free package fully RoHS compliant
•
Industrial Temperature information available upon request
•
Replaces the ICS8535-11
ICS
Guaranteed output and part-to-part skew characteristics
make the ICS8535-31 ideal for those applications demand-
ing well defined performance and repeatability.
B
LOCK
D
IAGRAM
CLK_EN
Pullup
D
Q
LE
CLK
Pulldown
0
Q0
nQ0
P
IN
A
SSIGNMENT
V
EE
CLK_EN
CLK_SEL
CLK
nc
XTAL_IN
XTAL_OUT
nc
nc
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
XTAL_IN
OSC
XTAL_OUT
CLK_SEL
Pulldown
1
Q1
nQ1
Q2
nQ2
Q3
nQ3
ICS8535-31
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm package body
G Package
Top View
8535AG-31
www.icst.com/products/hiperclocks.html
REV. B APRIL 29, 2005
IDT™ / ICS™
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
1
1
ICS8535-31
Integrated
ICS8535-31
Circuit
L
OW
S
KEW
, 1-
TO
-4, C
RYSTAL
O
SCILLATOR
/
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
TSD
Systems, Inc.
ICS8535-31
LVCMOS-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1
2
3
4
5, 8, 9
6,
7
10, 13, 18
11, 12
14, 15
16, 17
19, 20
Name
V
EE
CLK_EN
CLK_SEL
CLK
nc
XTAL_IN,
XTAL_OUT
V
CC
nQ3, Q3
nQ2, Q2
nQ1, Q1
nQ0, Q0
Power
Input
Input
Input
Unused
Input
Power
Output
Output
Output
Output
Type
Description
Negative supply pin.
Synchronizing clock enable. When HIGH, clock outputs follows clock
Pullup
input. When LOW, Q outputs are forced low, nQ outputs are forced high.
LVCMOS / LVTTL interface levels.
Clock select input. When HIGH, selects XTAL inputs.
Pulldown
When LOW, selects CLK input. LVCMOS / LVTTL interface levels.
Pulldown Clock input. LVCMOS / LVTTL interface levels.
No connect.
Cr ystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
Positive supply pins.
Differential clock outputs. LVPECL interface levels.
Differential clock outputs. LVPECL interface levels.
Differential clock outputs. LVPECL interface levels.
Differential clock outputs. LVPECL interface levels.
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
8535AG-31
www.icst.com/products/hiperclocks.html
2
REV. B APRIL 29, 2005
IDT™ / ICS™
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
2
ICS8535-31
Integrated
ICS8535-31
Circuit
L
OW
S
KEW
, 1-
TO
-4, C
RYSTAL
O
SCILLATOR
/
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
TSD
Systems, Inc.
ICS8535-31
LVCMOS-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
Outputs
T
ABLE
3A. C
ONTROL
I
NPUT
F
UNCTION
T
ABLE
Inputs
CLK_EN
0
0
1
CLK_SEL
0
1
0
Selected Source
CLK
XTAL_IN, XTAL_OUT
CL K
Q0:Q3
Disabled; LOW
Disabled; LOW
Enabled
nQ0:nQ3
Disabled; HIGH
Disabled; HIGH
Enabled
1
1
XTAL_IN, XTAL_OUT
Enabled
Enabled
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock or cr ystal
oscillator edge as shown in
Figure
1.
In the active mode, the state of the outputs are a function of the CLK input as described in Table 3B.
Disabled
Enabled
CLK
CLK_EN
nQ0:nQ3
Q0:Q3
F
IGURE
1. CLK_EN T
IMING
D
IAGRAM
T
ABLE
3B. C
LOCK
I
NPUT
F
UNCTION
T
ABLE
Inputs
CLK
0
1
Q0:Q3
LOW
HIGH
Outputs
nQ0:nQ3
HIGH
LOW
8535AG-31
www.icst.com/products/hiperclocks.html
3
REV. B APRIL 29, 2005
IDT™ / ICS™
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
3
ICS8535-31
Integrated
ICS8535-31
Circuit
L
OW
S
KEW
, 1-
TO
-4, C
RYSTAL
O
SCILLATOR
/
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
TSD
Systems, Inc.
ICS8535-31
LVCMOS-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
73.2°C/W (0 lfpm)
-65°C to 150°C
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
CC
I
EE
Parameter
Power Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
60
Units
V
mA
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
Input High Current
CLK,
CLK_SEL
CLK_EN
CLK,
CLK_SEL
CLK_EN
V
IN
= V
CC
= 3.465V
V
IN
= V
CC
= 3.465V
V
IN
= 0V, V
CC
= 3.465V
V
IN
= 0V, V
CC
= 3.465V
-5
-150
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3V
0.8
150
5
Units
V
V
µA
µA
µA
µA
I
IL
Input Low Current
T
ABLE
4C. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
8535AG-31
www.icst.com/products/hiperclocks.html
4
REV. B APRIL 29, 2005
IDT™ / ICS™
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
4
ICS8535-31
Integrated
ICS8535-31
Circuit
L
OW
S
KEW
, 1-
TO
-4, C
RYSTAL
O
SCILLATOR
/
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
TSD
Systems, Inc.
ICS8535-31
LVCMOS-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
Minimum Typical Maximum
Fundamental
12
40
50
7
1
MH z
Ω
pF
mW
Units
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
Test Conditions
T
ABLE
6. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol Parameter
f
MAX
t
PD
Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
Output Skew; NOTE 2, 4
Par t-to-Par t Skew; NOTE 3, 4
Output Rise/Fall Time
20% to 80%
300
155.52MHz,
(Integration Range:
12kHz - 20MHz)
1.45
0.057
30
200
600
Test Conditions
Minimum
Typical
Maximum
266
1.65
Units
MHz
ns
ps
ps
ps
ps
t
jit
t
sk(o)
t
sk(pp)
t
R
/ t
F
odc
Output Duty Cycle
46
54
%
All parameters measured at ƒ
≤
266MHz unless noted otherwise.
NOTE 1: Measured from the V
CC
/2 of the input to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
8535AG-31
www.icst.com/products/hiperclocks.html
5
REV. B APRIL 29, 2005
IDT™ / ICS™
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
5
ICS8535-31
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