Not recommended for new designs. No replacement is available
Data Sheet No. PD60294
IRS21853SPBF
DUAL HIGH SIDE DRIVER IC
Features
•
•
•
•
•
•
Gate drive supply range from 10 V to 20 V
Under voltage lockout for V
CC
& V
BS1,2
5 V input logic compatible
Tolerant to negative transient voltage
Matched propagation delays for all channels
RoHS compliant
Product Summary
V
OFFSET
V
OUT
t
on
/t
off
(typ)
I
o+/-
600 V max
10 V to 20 V
170 ns/170 ns
2 A/2 A
40 ns
Descriptions
The IRS21853 is a high voltage, high speed power
MOSFET and IGBT dual high-side driver with propagation
delay matched output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. The floating logic input is
compatible with standard CMOS or LSTTL output, down to
3.3 V logic and can be operated up to 600 V above the
ground. The output driver features a high pulse current
buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an
N-channel power MOSFET or IGBT in the high-side
configuration, which operates up to 600 V.
Delay Matching
Package
16-Lead SOIC (narrow body
)
Typical Connection Diagram
1
2
3
4
5
6
7
8
VCC
COM
H IN 1
H IN 2
V B1
HO1
V S1
16
15
14
13
12
11
10
9
+V D C 1
IR S21853
S O N 16
V S2
HO2
V B2
+VD C 2
Not recommended for new designs. No replacement is available
IRS21853SPBF
Typical Connection Diagram for ER Circuit in PDP
1
2
3
4
5
6
7
8
VCC
COM
HIN1
HIN2
VB1
HO1
VS1
16
15
14
13
12
11
10
9
C
ERC
L
ER
C
Cp
IRS21853
SON16
VS2
HO2
VB2
2
Not recommended for new designs. No replacement is available
IRS21853SPBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur.
parameters are absolute voltages referenced to COM.
All voltage
Symbol
V
CC
V
IN
V
B1,2
V
S1,2
V
HO1,2
dV
S
/dt
P
D
R
θJA
T
J
T
S
T
L
Note1:
Definition
Low side supply voltage
Logic input voltage (HIN1,2)
High side floating well supply voltage
High side floating well supply return voltage
Floating gate drive output voltage
Allowable V
S1,2
offset supply transient relative to COM
Package power dissipation @ T
A
≤+25
ºC
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
Min
-0.3
COM-0.3
-0.3
V
B1,2
-20
V
S1,2
-0.3
-
-
-
-55
-
Max
20 (Note1)
V
CC
+0.3
620 (Note1)
V
Bn
+0.3
V
Bn
+0.3
50
1.25
100
150
300
Units
V
V/ns
W
ºC/W
ºC
All supplies are fully tested at 25 V. An internal 20 V clamp exists for each supply.
Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute
voltages referenced to COM. The offset rating are tested with supplies of (V
CC
-COM)=(V
B1,2
-V
S1,2
)=15 V.
Symbol
V
CC
V
IN
V
B1,2
V
S1,2
V
HO1,2
T
A
Note 2:
Note 3:
Definition
Low side supply voltage
HIN1, 2 input voltage
High side floating well supply voltage
High side floating well supply offset voltage
Floating gate drive output voltage
Ambient temperature
Min
10
COM
V
S1,2
+10
Note 2
V
S1,2
-40
Max
20
VCC
V
S1,2
+20
600
V
B1,2
125
Units
V
ºC
V
S1,2
and V
B1,2
voltages will be tolerant to short negative transient spikes. These will be defined and specified in
the future.
Logic operation for V
S
of –5 V to 600 V. Logic state held for V
S
of –5 V to –V
BS1,2
. (Please refer to Design Tip
DT97-3 for more details).
3
Not recommended for new designs. No replacement is available
IRS21853SPBF
Static Electrical Characteristics
(V
CC
-COM)=(V
B1,2
-V
S1,2
)=15 V. T
A
= 25
o
C unless otherwise specified. The V
IN
, V
IN,TH
, and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to respective V
S1,2
and are applicable to the respective output leads
HO1,2. The VCCUV parameters are referenced to COM. The V
BSUV1,2
parameters are referenced to V
S1,2
.
Symbol
V
CCUV+
V
CCUV-
V
BSUV+
V
BSUV-
I
LK1,2
I
QBS
I
QCC
V
IH
V
IL
V
OH
V
OL
I
IN+
I
IN-
I
o+
I
o-
Definition
V
CC
supply undervoltage positive going threshold
V
CC
supply undervoltage negative going threshold
V
BS1,2
supply undervoltage positive going
threshold
V
BS1,2
supply undervoltage negative going
threshold
High-side floating well offset supply leakage
current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input voltage
Logic “0” input voltage
HO1,2 high level output voltage, V
BIAS
-V
O
HO1,2 low level output voltage, V
O
Logic “1” input bias current
Logic “0” input bias current
Output high short circuit pulsed current
HO1,2
Output low short circuit pulsed current
HO1,2
Min
8.0
7.4
8.0
7.4
---
---
---
3.5
---
---
---
---
---
---
---
Typ
8.9
8.2
8.9
8.2
---
75
110
---
---
---
---
5
---
2
2
Max Units
9.8
9.0
V
9.8
9.0
50
150
220
---
0.6
1.4
0.0
6
20
µA
5
---
A
---
V
µA
Test Conditions
V
B1,2
= V
S1,2
= 600 V
HIN1,2 = 0 V or 5 V
I
o
= 0 A
I
o
=20 mA
V
HIN1,2
=5 V
V
HIN1,2
=0 V
V
O
=0 V,V
IN
=0 V,
PW<=10 µs
V
O
=15 V,V
IN
=5 V,
PW<=10 µs
4
Not recommended for new designs. No replacement is available
IRS21853SPBF
Dynamic Electrical Characteristics (All values are target data)
(V
CC
-COM)= (V
B1,2
-V
S1,2
)=15 V. T
A
= 25
o
C unless otherwise specified. C
L
= 1000 pF unless otherwise specified. All
parameters are reference to COM.
Symbol
t
on
t
off
t
r
t
f
MT
Definition
Turn-on propagation delay (HO1,2)
Turn-off propagation delay (HO1,2)
Turn-on rise time
Turn-off fall time
Delay matching (Note 1)
Min
---
---
---
---
---
Typ
170
170
15
15
---
Max
---
---
50
50
40
Units
Test Conditions
(V
s1,2
-COM)=0 V
(V
s1,2
-COM)=600 V
ns
Note 4:Max(t
on
,
HO1
, t
on,HO2
)- Min(t
on,HO1
, t
on,HO2
); Max(t
off,HO1
, t
off,HO2
)- Min(t
off,HO1
, t
off,HO2
)
5
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