Cypress Developer Community ................................. 16
Technical Support ..................................................... 16
Document Number: 001-06490 Rev. *H
Page 2 of 16
CY7C1399BN
Pin Configurations
Figure 1. 28-pin TSOP pinout (Top View)
TSOP
Top View
OE
A
1
A
2
A
3
A
4
WE
V
CC
A
5
A
6
A
7
A
8
A
9
A
10
A
11
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A
0
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
14
A
13
A
12
Figure 2. 28-pin SOJ pinout (Top View)
SOJ
Top View
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
I/O
0
I/O
1
I/O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
A
4
A
3
A
2
A
1
OE
A
0
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
Selection Guide
Description
Maximum access time (ns)
Maximum operating current (mA)
Maximum CMOS standby current (A)
Commercial
Commercial (L)
Industrial
Automotive-A
Condition
-12
12
55
500
50
500
–
-15
15
50
–
–
500
500
Document Number: 001-06490 Rev. *H
Page 3 of 16
CY7C1399BN
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ................................ –65
C
to +150
C
Ambient temperature with
power applied .......................................... –55
C
to +125
C
Supply voltage on
V
CC
to relative GND
[1]
................................–0.5 V to +4.6 V
DC voltage applied to outputs
in high Z State
[1]
................................. –0.5 V to V
CC
+ 0.5 V
DC input voltage
[1]
............................. –0.5 V to V
CC
+ 0.5 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(per MIL-STD-883, Method 3015) .......................... >2001 V
Latch-up current .................................................... >200 mA
Operating Range
Range
Commercial
Industrial
Automotive-A
Ambient Temperature
0
C
to +70
C
–40
C
to +85
C
–40
C
to +85
C
V
CC
3.3 V
300
mV
Electrical Characteristics
Over the Operating Range
Parameter
[1]
V
OH
V
OL
V
IH
V
IL[1]
I
IX
I
OZ
I
CC
I
SB1
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
Output leakage current
V
CC
operating supply current
Automatic CE power-down
current – TTL inputs
GND
V
IN
V
CC
, Output disabled
Max V
CC
, I
OUT
= 0 mA,
f = f
MAX
= 1/t
RC
Max V
CC
, CE
V
IH
, Commercial
V
IN
V
IH
, or
Commercial (L)
V
IN
V
IL
,
f = f
MAX
Industrial
Automotive-A
I
SB2
Automatic CE Power-down
current – CMOS inputs
[2]
Max V
CC
,
CE
V
CC
– 0.3 V,
Commercial
Commercial (L)
Test Conditions
Min V
CC
, I
OH
= –2.0 mA
Min V
CC
, I
OL
= 4.0 mA
-12
Min
2.4
–
2.2
–0.3
–1
–5
–
–
–
–
–
–
–
–
–
Max
–
0.4
V
CC
+ 0.3
0.8
+1
+5
55
5
4
5
–
500
50
500
–
Min
2.4
–
2.2
–0.3
–1
–5
–
–
–
–
–
–
–
–
–
-15
Max
–
0.4
V
CC
+ 0.3
0.8
+1
+5
50
–
–
5
5
–
–
500
500
Unit
V
V
V
V
A
A
mA
mA
mA
mA
mA
A
A
A
A
Industrial
V
IN
V
CC
– 0.3 V, or
Automotive-A
V
IN
0.3 V,
WE
V
CC
– 0.3 V or
WE
0.3
V,
f = f
MAX
Notes
1. Minimum voltage is equal to – 2.0 V for pulse durations of less than 20 ns.
2. Device draws low standby current regardless of switching on the addresses.
Document Number: 001-06490 Rev. *H
Page 4 of 16
CY7C1399BN
Capacitance
Parameter
[3]
C
IN
: Controls
C
OUT
Output capacitance
Description
Test Conditions
T
A
= 25C, f = 1 MHz, V
CC
= 3.3 V
Max
5
6
6
Unit
pF
pF
pF
C
IN
: Addresses Input capacitance
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
[4]
3.3 V
OUTPUT
INCLUDING
JIG AND
SCOPE
C
L
R2
351
R1 317
3.0 V
GND
10%
ALL INPUT PULSES
90%
90%
10%
3 ns
Equivalent to:
OUTPUT
THÉVENINEQUIVALENT
167
1.73 V
3 ns
Data Retention Characteristics
(Over the Operating Range - L version only)
Parameter
V
DR
I
CCDR
t
CDR
t
R
Description
V
CC
for data retention
Data retention current
Chip deselect to data retention
time
Operation recovery time
V
CC
= V
DR
= 2.0 V,
CE > V
CC
– 0.3 V,
V
IN
> V
CC
– 0.3 V or V
IN
< 0.3 V
Conditions
Min
2.0
0
0
t
RC
Max
–
20
–
–
Unit
V
A
ns
ns
Data Retention Waveform
Figure 4. Data Retention Waveform
DATA RETENTION MODE
V
CC
CE
3.0 V
t
CDR
V
DR
2 V
3.0 V
t
R
Notes
3. Tested initially and after any design or process changes that may affect these parameters.
4. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and output loading of the specified I
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