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7054S20G

产品描述SRAM 4K x 8 FourPort RAM
产品类别存储   
文件大小743KB,共12页
制造商IDT(艾迪悌)
官网地址http://www.idt.com/
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7054S20G概述

SRAM 4K x 8 FourPort RAM

7054S20G规格参数

参数名称属性值
产品种类
Product Category
SRAM
制造商
Manufacturer
IDT(艾迪悌)
RoHSNo
封装 / 箱体
Package / Case
PGA-108
系列
Packaging
Bulk
高度
Height
3.68 mm
长度
Length
30.48 mm
工厂包装数量
Factory Pack Quantity
3
宽度
Width
30.48 mm

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HIGH-SPEED
4K x 8 FourPort
TM
STATIC RAM
IDT7054S/L
Features
High-speed access
– Commercial: 20/25/35ns (max.)
– Industrial: 25ns (max.)
Low-power operation
– IDT7054S
Active: 750mW (typ.)
Standby: 7.5mW (typ.)
– IDT7054L
Active: 750mW (typ.)
Standby: 1.5mW (typ.)
True FourPort memory cells which allow simultaneous
access of the same memory locations
Fully asynchronous operation from each of the four ports:
P1, P2, P3, and P4
TTL-compatible; single 5V (±10%) power supply
Available in 128 pin Thin Quad Flatpack package
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Description
The IDT7054 is a high-speed 4K x 8 FourPort™ Static RAM designed
to be used in systems where multiple access into a common RAM is
required. This FourPort Static RAM offers increased system performance
in multiprocessor systems that have a need to communicate in real time and
also offers added benefit for high-speed systems in which multiple access
is required in the same cycle.
The IDT7054 is also designed to be used in systems where on-chip
hardware port arbitration is not needed. This part lends itself to those
systems which cannot tolerate wait states or are designed to be able to
externally arbitrated or withstand contention when all ports simulta-
neously access the same FourPort RAM location.
The IDT7054 provides four independent ports with separate control,
Functional Block Diagram
R/
W
P1
CE
P1
OE
P1
CE
P4
R/
W
P4
OE
P4
I/O
0P1
-I/O
7P1
COLUMN
I/O
COLUMN
I/O
I/O
0P4
-I/O
7P4
A
0P1
- A
11P1
PORT 1
ADDRESS
DECODE
LOGIC
PORT 2
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
PORT 4
ADDRESS
DECODE
LOGIC
PORT 3
ADDRESS
DECODE
LOGIC
A
0P4
- A
11P4
A
0P2
- A
11P2
A
0P3
- A
11P3
I/O
0P2
-I/O
7P2
OE
P2
CE
P2
R/
W
P2
COLUMN
I/O
COLUMN
I/O
I/O
0P3
-I/O
7P3
OE
P3
CE
P3
R/
W
P3
3241 drw 01
FEBRUARY 2015
1
©2015 Integrated Device Technology, Inc.
DSC 3241/13

 
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