CY62146GN MoBL
®
4-Mbit (256K × 16) Static RAM
4-Mbit (256K × 16) Static RAM
Features
■
■
Functional Description
The CY62146GN is a high performance CMOS static RAM
organized as 256K words by 16 bits. This device features an
advanced circuit design designed to provide an ultra low active
current. Ultra low active current is ideal for providing More
Battery Life (MoBL
®
) in portable applications such as cellular
telephones. The device also has an automatic power down
feature that significantly reduces power consumption by 80
percent when addresses are not toggling.The device can also be
put into standby mode reducing power consumption by more
than 99 percent when deselected (CE HIGH). The input and
output pins (I/O
0
through I/O
15
) are placed in a high impedance
state when the device is deselected (CE HIGH), outputs are
disabled (OE HIGH), both Byte High Enable and Byte Low
Enable are disabled (BHE, BLE HIGH), or a write operation is in
progress (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) input LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O
0
through I/O
7
) is written into the location
specified on the address pins (A
0
through A
17
). If Byte High
Enable (BHE) is LOW, then data from the I/O pins (I/O
8
through
I/O
15
) is written into the location specified on the address pins
(A
0
through A
17
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on I/O
0
to I/O
7
. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O
8
to I/O
15
. See the
Truth Table on page 11
for a
complete description of read and write modes.
Very high speed: 45 ns
Temperature ranges
❐
Industrial: –40 °C to +85 °C
Wide voltage range: 2.20 V to 3.60 V and 4.5 V to 5.5 V
Ultra low standby power
❐
Typical standby current: 3.5
A
❐
Maximum standby current: 8.7
A
Ultra low active power
❐
Typical active current: 3.5 mA at f = 1 MHz
Automatic power down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Available in a 44-pin TSOP II and 48-ball VFBGA Packages
■
■
■
■
■
■
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
256K x 16
RAM Array
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
A
11
A
12
A
13
A
15
A
14
A
16
A
17
Cypress Semiconductor Corporation
Document Number: 001-95417 Rev. *E
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised December 15, 2017
CY62146GN MoBL
®
Contents
Pin Configurations ........................................................... 3
Product Portfolio .............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 11
Ordering Information ...................................................... 12
Ordering Code Definitions ......................................... 12
Package Diagrams .......................................................... 13
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC® Solutions ...................................................... 16
Cypress Developer Community ................................. 16
Technical Support ..................................................... 16
Document Number: 001-95417 Rev. *E
Page 2 of 16
CY62146GN MoBL
®
Pin Configurations
Figure 1. 44-pin TSOP II Pinout
[1]
A
4
A
3
A
2
A
1
A
0
CE
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
V
SS
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
17
A
16
A
15
A
14
A
13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
5
A
6
A
7
OE
BHE
BLE
I/O
15
I/O
14
I/O
13
I/O
12
V
SS
V
CC
I/O
11
I/O
10
I/O
9
I/O
8
NC
A
8
A
9
A
10
A
11
A
12
Figure 2. 48-ball VFBGA Pinout
[1]
1
BLE
I/O
8
I/O
9
V
SS
V
CC
I/O
14
I/O
15
NC
2
OE
BHE
I/O
10
I/O
11
I/O
12
I/O
13
NC
A
8
3
A
0
A
3
A
5
A
17
NC
A
14
A
12
A
9
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
NC
I/O
0
I/O
2
V
CC
Vss
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
Product Portfolio
Power Dissipation
Product
Range
V
CC
Range (V)
Min
CY62146GN30
CY62146GN
Industrial
2.2
4.5
Typ
[2]
3.0
5.0
Max
3.6
5.5
45
45
Speed
(ns)
Operating I
CC
(mA)
f = 1 MHz
Typ
[2]
3.5
Max
6
f = f
max
Typ
[2]
15
Max
20
Standby I
SB2
(A)
Typ
[2]
3.5
Max
8.7
Notes
1. NC pins are not connected on the die.
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
Document Number: 001-95417 Rev. *E
Page 3 of 16
CY62146GN MoBL
®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature
with power applied .................................. –55 °C to + 125 °C
Supply voltage
to ground potential ........................... –0.3 V to + V
CC
+ 0.5 V
DC voltage applied to outputs
in High-Z state
[3, 4]
........................... –0.3 V to + V
CC
+ 0.5 V
DC input voltage
[3, 4]
........................ –0.3 V to + V
CC
+ 0.5 V
Output current into outputs (LOW) ............................. 20 mA
Static Discharge Voltage
(per MIL-STD-883, Method 3015) .......................... >2001 V
Latch-up Current .................................................... >200 mA
Operating Range
Device
CY62146GN30
Range
Industrial
Ambient
Temperature
–40 °C to +85 °C
V
CC
[5]
2.2 V to 3.6 V,
4.5 V to 5.5 V
Electrical Characteristics
Over the Operating Range
Parameter
Description
2.2 V to 2.7 V
V
OH
Output high
voltage
2.7 V to 3.6 V
4.5 V to 5.5 V
4.5 V to 5.5 V
2.2 V to 2.7 V
V
OL
Output low
voltage
2.7 V to 3.6 V
4.5 V to 5.5 V
2.2 V to 2.7 V
V
IH
[4]
Test Conditions
V
CC
= Min, I
OH
= –0.1 mA
V
CC
= Min, I
OH
= –1.0 mA
V
CC
= Min, I
OH
= –1.0 mA
V
CC
= Min, I
OH
= –0.1 mA
V
CC
= Min, I
OL
= 0.1 mA
V
CC
= Min, I
OL
= 2.1 mA
V
CC
= Min, I
OL
= 2.1 mA
–
–
–
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
–
GND < V
I
< V
CC
GND < V
O
< V
CC
, Output disabled
f = f
max
= 1/t
RC
f = 1 MHz
V
CC
= V
CC(max)
,
I
OUT
= 0 mA
CMOS levels
45 ns
Min
2
2.4
2.4
V
CC
– 0.5
[7]
–
–
–
1.8
2.0
2.2
–0.3
–0.3
–0.5
–1
–1
–
–
Typ
[6]
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
15
3.5
Max
–
–
–
–
0.4
0.4
0.4
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.5
0.6
0.8
0.8
+1
+1
20
6
Unit
V
V
Input high
voltage
2.7 V to 3.6 V
4.5 V to 5.5 V
2.2 V to 2.7 V
V
V
IL[3]
I
IX
I
OZ
I
CC
Input LOW
Voltage
2.7 V to 3.6 V
4.5 V to 5.5 V
V
mA
mA
mA
Input leakage current
Output leakage current
V
CC
operating supply current
I
SB1
CE > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
Automatic CE power down current – f = f
max
(Address and data only),
CMOS inputs
f = 0 (OE, BHE, BLE and WE),
V
CC
= 3.60 V
Automatic CE power down current – CE > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
CMOS inputs
f = 0, V
CC
= 3.60 V
–
3.5
8.7
A
I
SB2[8]
–
3.5
8.7
A
Notes
3. V
IL(min)
= –2.0 V for pulse durations less than 20 ns.
4. V
IH(max)
= V
CC
+ 2.0 V for pulse durations less than 20 ns.
5. Full-device operation requires linear V
CC
ramp from V
DR
to V
CC(min)
> 100
s or stable at V
CC(min)
> 100
s.
6. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
7. This parameter is guaranteed by design and not tested.
8. Chip enable (CE) need to be tied to CMOS levels to meet the I
SB1
/ I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
Document Number: 001-95417 Rev. *E
Page 4 of 16
CY62146GN MoBL
®
Capacitance
Parameter
[9]
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25
C,
f = 1 MHz, V
CC
= V
CC(typ)
Max
10
10
Unit
pF
pF
Thermal Resistance
Parameter
[9]
JA
JC
Description
Test Conditions
48-ball VFBGA
31.35
14.74
TSOP II
68.85
15.97
Unit
C/W
C/W
Thermal resistance Still air, soldered on a
(junction to ambient) 3 × 4.5 inch,
Thermal resistance four-layer printed
circuit board
(junction to case)
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
[10]
V
CC
Output
30 pF
Including
JIG and
Scope
R2
R1
V
CC
GND
Rise Time = 1 V/ns
10%
All Input Pulses
90%
90%
10%
Fall Time = 1 V/ns
Equivalent to: Thevenin Equivalent
Output
R
TH
V
Parameters
R1
R2
R
TH
V
TH
2.50 V
16667
15385
8000
1.20
3.0 V
1103
1554
645
1.75
Unit
V
Note
9. Tested initially and after any design or process changes that may affect these parameters.
10. Full-device operation requires linear V
CC
ramp from V
DR
to V
CC(min)
> 100
s
or stable at V
CC(min)
> 100
s.
Document Number: 001-95417 Rev. *E
Page 5 of 16
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