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74HC4094PW118

产品描述Operational Amplifiers - Op Amps Single 1.8V 1MHz
产品类别半导体    逻辑   
文件大小789KB,共22页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
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74HC4094PW118概述

Operational Amplifiers - Op Amps Single 1.8V 1MHz

74HC4094PW118规格参数

参数名称属性值
产品种类
Product Category
Counter Shift Registers
制造商
Manufacturer
NXP(恩智浦)
RoHSDetails
Counting SequenceSerial to Serial/Parallel
Number of Circuits1
Number of Bits8 bit
封装 / 箱体
Package / Case
SOT-403
Logic FamilyHC
Logic TypeCMOS
Number of Input Lines1
输出类型
Output Type
3-State
传播延迟时间
Propagation Delay Time
195 ns, 39 ns, 33 ns
电源电压-最大
Supply Voltage - Max
5 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C
系列
Packaging
MouseReel
系列
Packaging
Reel
系列
Packaging
Cut Tape
FunctionShift Register/Latch
安装风格
Mounting Style
SMD/SMT
Number of Output Lines10
Factory Pack Quantityctfwqvxdezwbtc2500
宽度
Width
4.5 mm

文档预览

下载PDF文档
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Rev. 7 — 10 February 2016
Product data sheet
1. General description
The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a
storage register and 3-state outputs. Both the shift and storage register have separate
clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to
enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is
available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when
clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW
transition of the CP input to allow cascading when clock edges are slow. The data in the
shift register is transferred to the storage register when the STR input is HIGH. Data in the
storage register appears at the outputs whenever the output enable input (OE) is HIGH. A
LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the
OE input does not affect the state of the registers. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
.
2. Features and benefits
Complies with JEDEC standard JESD7A
Input levels:
For 74HC4094: CMOS level
For 74HCT4094: TTL level
Low-power dissipation
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Specified from
40 C
to +85
C
and from
40 C
to +125
C
3. Applications
Serial-to-parallel data conversion
Remote control holding register

74HC4094PW118相似产品对比

74HC4094PW118 74HC4094D652 74HCT4094DB112 74HC4094PW112
描述 Operational Amplifiers - Op Amps Single 1.8V 1MHz USB Interface IC USB to Serial UART Enhanced IC SSOP-28 Counter Shift Registers 8-STAGE SHIFT AND Counter Shift Registers 8-STAGE SHIFT AND
产品种类
Product Category
Counter Shift Registers Counter Shift Registers Counter Shift Registers Counter Shift Registers
制造商
Manufacturer
NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦)
RoHS Details Details Details Details
Counting Sequence Serial to Serial/Parallel Serial to Serial/Parallel Serial to Serial/Parallel Serial to Serial/Parallel
Number of Circuits 1 8 1 1
Number of Bits 8 bit 8 bit 8 bit 8 bit
封装 / 箱体
Package / Case
SOT-403 SOT-109 SOT-338 SOT-403
Logic Family HC 74HC HCT HC
Logic Type CMOS CMOS CMOS CMOS
Number of Input Lines 1 4 1 1
输出类型
Output Type
3-State 3-State 3-State 3-State
传播延迟时间
Propagation Delay Time
195 ns, 39 ns, 33 ns 45 ns 43 ns 195 ns, 39 ns, 33 ns
电源电压-最大
Supply Voltage - Max
5 V 6 V 5.5 V 6 V
最小工作温度
Minimum Operating Temperature
- 40 C - 40 C - 40 C - 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C + 125 C + 125 C + 125 C
Function Shift Register/Latch Shift Register/Latch Shift Register/Latch Shift Register/Latch
安装风格
Mounting Style
SMD/SMT SMD/SMT SMD/SMT SMD/SMT
Number of Output Lines 10 10 10 10
宽度
Width
4.5 mm 4 mm 5.4 mm 4.5 mm
系列
Packaging
Cut Tape Tube Tube Tube
工厂包装数量
Factory Pack Quantity
- 1000 1092 2400

 
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