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74VHC125FT

产品描述Multilayer Ceramic Capacitors MLCC - SMD/SMT 0603 0.1uF 50volts X7R 10%
产品类别逻辑    逻辑   
文件大小182KB,共8页
制造商Toshiba(东芝)
官网地址http://toshiba-semicon-storage.com/
标准
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74VHC125FT概述

Multilayer Ceramic Capacitors MLCC - SMD/SMT 0603 0.1uF 50volts X7R 10%

74VHC125FT规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Toshiba(东芝)
零件包装代码TSSOP
包装说明TSSOP-14
针数14
Reach Compliance Codecompliant
Factory Lead Time12 weeks
Samacsys DescriptionToshiba 74VHC125FT, Quad, Quad Bus Buffer, 14.5 ns @ 50 pF 8mA, 14-Pin TSSOP
系列AHC/VHC/H/U/V
JESD-30 代码R-PDSO-G14
长度5 mm
逻辑集成电路类型BUS DRIVER
位数1
功能数量4
端口数量2
端子数量14
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)NOT SPECIFIED
传播延迟(tpd)13 ns
座面最大高度1.2 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度4.4 mm

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74VHC125FT,74VHC126FT
CMOS Digital Integrated Circuits
Silicon Monolithic
74VHC125FT,74VHC126FT
1. Functional Description
• Quad Bus Buffer, Non-Inverted 3-State Outputs
74VHC125FT: Quad Bus Buffer
74VHC126FT: Quad Bus Buffer
2. General
The 74VHC125FT,74VHC126FT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate
C
2
MOS technology.
They achieve the high speed operation similar to equivalent Bipolar Shottky TTL while maintaining the CMOS
low power dissipation.
The 74VHC125FT requires the 3-state control input G to be set high to place the output into the high impedance
state, whereas the 74VHC126FT requires the control input G to be set low to place the output into high impedance.
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
This circuit prevents device destruction due to mismatched supply and input voltages.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
AEC-Q100 (Rev. H) (Note 1)
Wide operating temperature: T
opr
= -40 to 125
High speed: Propagation delay time = 3.8 ns (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
= 4.0
µA
(max) at T
a
= 25
High noise immunity: V
NIH
= V
NIL
= 28 % V
CC
(min)
Power down protection is provided on all inputs.
Balanced propagation delays: t
PLH
t
PHL
Wide operating voltage range: V
CC(opr)
= 2.0 V to 5.5 V
Low noise: V
OLP
= 0.8 V (max)
(10) Pin and function compatible with 74 series (AC/HC/AHC/LV etc.) 125 or 126 type.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
4. Packaging
TSSOP14B
Start of commercial production
©2016 Toshiba Corporation
1
2013-06
2016-08-18
Rev.4.0

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