*1 Mounted on a specified board: 70mm50mm1.2mm (4 layer glass epoxy)
Caution 1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Recommendation Operating Condition
at Ta = 25C
Parameter
Supply voltage range1
PWM frequency
Symbol
VCC op
Fpwm
VCC
Conditions
Ratings
2.7 to 5.5
300 to 100k
Unit
V
Hz
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Electrical Characteristics Analog block
at Ta
½
25C, VCC = 3.6V, unless otherwise specified
Parameter
Standby current dissipation
DC/DC current dissipation
FB voltage
FB pin leak current
OVP voltage
SWOUT ON resistance
NMOS switch current limit
OSC frequency
High level input voltage
Low level input voltage
Under voltage lockout
PWM setup time from
shutdown
PWM low time to shutdown
Toff
8.9
ms
Symbol
ICC1
ICC2
Vfb
Ifb
Vovp
Ron
ILIM
Fosc
VINH
VINL
Vuvlo
Ton
PWM
PWM
VIN falling
20
1.5
0
2.2
SW
IL = 100mA
Vfb = 200mV
40
41
700
0.7
600
VCC
0.4
SHUTDOWN
VOUT = 30V, ILED = 20mA
PWM duty 100%
0.19
0.2
Conditions
Ratings
min
typ
0
max
5
1
0.21
1
42
Unit
A
mA
V
A
V
m
A
kHz
V
V
V
us
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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2
LV52205MU
Block Diagram
VBAT
4
VCC
6
UVLO
OCP
OVP
SW
TSD
600kHz PWM
Controler
1
PWM
FCAP
5
VREF
CONTROL
2
VREF
3
FB
GND
Pin Connections
FB 1
FCAP 2
GND 3
Top view
6 VIN
5 PWM
4 SW
Pin Function
PIN #
1
2
3
4
5
6
FB
FCAP
GND
SW
PWM
VCC
Expose-pad
Pin Name
Feedback pin.
Filtering capacitor terminal for PWM signal.
Ground
Switch pin. Drain of the internal power FET.
PWM dimming input (active High).
Supply voltage.
Connect to GND on PCB.
Description
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3
LV52205MU
3.0
Pd max -- Ta
Mounted on a specified board: 70×50×1.2mm
3
(4 layer glass epoxy)
Allowable power dissipation, Pd max -- W
2.0
2.05
1.0
0.82
0
--30
0
30
60
90
120
Ambient temperature, Ta --
C
LED Current Setting
LED current is set by an external resistor connected between the FB pin and ground.
ILED = VFB/RFB.
The VFB can be controled by PWM signal. PWM input is converted into a near DC current by the internal resistor R
that was equivalent to 60k (±10%) and the external capacitor CFCAP as a low pass filter with a cut-off frequency fc =
1/2πRCFCAP. The VFB can be adjusted by altering the duty cycle of the PWM signal (See Fig.1).
VFB = 200 (mV)
PWM Duty (%)
200
180
160
140
VFB (mV)
120
100
80
60
40
20
0
0
10
20
30
40
50
60
70
80
90
100
PWM Duty (%)
Fig1.
VFB
vs. PWM Duty
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4
LV52205MU
PWM Control
DC-DC Delay
max = 4.6ms
Ton>20us
PWM
Shutdown
PWM Enable
DCDCENH
(IC inside signal)
Toff > 8.9ms
FB
Max 4ms @ Cfcap = 22nF
(T.C.= 60k * Cfcap)
FCAP
The time until stable movement max = 8.6ms
Fig2.Timing Diagram in PWM signal
Open LED Protection
If SW terminal voltage exceeds a threshold Vovp (41V typ) for 8 cycles, boost converter enters shutdown mode. In
order to restart the IC, PWM setup signal is required again.
Over Current Protection
Current limit value for built-in power MOS is around 0.7A. The power MOS is turned off for each switching cycle when
peak current through it exceeds the limit value.
Under Voltage Lock Out (UVLO)
UVLO operation works when VIN terminal voltage is below 2.2V.
Thermal Shutdown
When chip temperature is too high, boost converter is stopped.