MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MJL16218/D
™
Data Sheet
SCANSWITCH
™
Designer's
MJL16218*
*Motorola Preferred Device
NPN Bipolar Power Deflection Transistor
For High and Very High Resolution Monitors
The MJL16218 is a state–of–the–art SWITCHMODE™ bipolar power transistor. It is
specifically designed for use in horizontal deflection circuits for 20 mm diameter neck,
high and very high resolution, full page, monochrome monitors.
•
•
•
•
1500 Volt Collector–Emitter Breakdown Capability
Typical Dynamic Desaturation Specified (New Turn–Off Characteristic)
Application Specific State–of–the–Art Die Design
Fast Switching:
175 ns Inductive Fall Time (Typ)
2000 ns Inductive Storage Time (Typ)
•
Low Saturation Voltage:
0.2 Volts at 5.0 Amps Collector Current and 2.0 A Base Drive
•
Low Collector–Emitter Leakage Current — 250
µA
Max at 1500 Volts — VCES
•
High Emitter–Base Breakdown Capability For High Voltage Off Drive Circuits —
8.0 Volts (Min)
MAXIMUM RATINGS
Rating
Collector–Emitter Breakdown Voltage
Collector–Emitter Sustaining Voltage
Emitter–Base Voltage
Collector Current — Continuous
— Pulsed (1)
Base Current — Continuous
— Pulsed (1)
Maximum Repetitive Emitter–Base
Avalanche Energy
Total Power Dissipation @ TC = 25°C
@ TC = 100°C
Derated above TC = 25°C
Operating and Storage Temperature Range
Symbol
VCES
VCEO(sus)
VEBO
IC
ICM
IB
IBM
W (BER)
PD
POWER TRANSISTOR
15 AMPERES
1500 VOLTS — VCES
170 WATTS
CASE 340G–02, STYLE 2
TO–3PBL
Value
1500
650
8.0
15
20
7.0
14
0.2
170
39
1.49
– 55 to 125
Unit
Vdc
Vdc
Vdc
Adc
Adc
mJ
Watts
W/°C
°C
TJ, Tstg
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance — Junction to Case
Lead Temperature for Soldering Purposes
1/8″ from the case for 5 seconds
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle
≤
10%.
(2) Proper strike and creepage distance must be provided.
Symbol
R
θJC
TL
Max
0.67
275
Unit
°C/W
°C
Designer’s and SCANSWITCH are trademarks of Motorola, Inc.
Designer’s Data for “Worst Case” Conditions
— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred
devices are Motorola recommended choices for future use and best overall value.
©
Motorola, Inc. 1997
Motorola Bipolar Power Transistor Device Data
1
MJL16218
ELECTRICAL CHARACTERISTICS
(TC = 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS (2)
(VCE = 1500 V, VBE = 0 V)
(VCE = 1200 V, VBE = 0 V)
Emitter–Base Leakage (VEB = 8.0 Vdc, IC = 0)
Emitter–Base Breakdown Voltage (IE = 1.0 mA, IC = 0)
Collector–Emitter Sustaining Voltage (Table 1) (IC = 10 mAdc, IB = 0)
ON CHARACTERISTICS (2)
Collector–Emitter Saturation Voltage
(IC = 5.0 Adc, IB = 2.0 Adc)
(IC = 3.0 Adc, IB = 0.6 Adc)
Base–Emitter Saturation Voltage (IC = 5.0 Adc, IB = 1.0 Adc)
DC Current Gain
(IC = 1.0 A, VCE = 5.0 Vdc)
(IC = 12 A, VCE = 5.0 Vdc)
VCE(sat)
VBE(sat)
hFE
—
—
—
—
4.0
0.17
0.14
0.9
24
6.0
1.0
0.5
1.5
—
—
Vdc
Vdc
—
Collector Cutoff Current
ICES
IEBO
V(BR)EBO
VCEO(sus)
—
—
—
8.0
650
—
—
—
11
—
250
25
25
—
—
µAdc
µAdc
Vdc
Vdc
Symbol
Min
Typ
Max
Unit
DYNAMIC CHARACTERISTICS
Dynamic Desaturation Interval (IC = 5.5 A, IB1 = 2.2 A, LB = 1.5
µH)
Output Capacitance
(VCE = 10 Vdc, IE = 0, ftest = 100 kHz)
Gain Bandwidth Product
(VCE = 10 Vdc, IC = 0.5 A, ftest = 1.0 MHz)
SWITCHING CHARACTERISTICS
Inductive Load (IC = 6.0 A, IB = 2.0 A), High Resolution Deflection
Simulator Circuit Table 2
Storage
Fall Time
(2) Pulse Test: Pulse Width = 300
µs,
Duty Cycle
≤
2.0%.
ns
tsv
tfi
—
—
2000
175
3000
250
tds
Cob
fT
—
—
—
350
300
0.8
—
500
—
ns
pF
MHz
SAFE OPERATING AREA
100
18
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
10
10 ms
50 ms
1.0
100 ms
250 ms
0.1
IC/IB = 5
TJ
≤
100°C
14
10
6
2
0.01
1.0
10
100
VCE, COLLECTOR–EMITTER VOLTAGE (V)
1000
0
300
600
900
1200
1500
VCE, COLLECTOR–EMITTER VOLTAGE (V)
Figure 1. Maximum Forward Bias
Safe Operating Area
Figure 2. Maximum Reverse Bias
Safe Operating Area
2
Motorola Bipolar Power Transistor Device Data
MJL16218
SAFE OPERATING AREA (continued)
FORWARD BIAS
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
The data of Figure 1 is based on TC = 25
_
C; T J(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC
≥
25
_
C. Second breakdown limitations do not
derate the same as thermal limitations. Allowable current at
the voltages shown on Figure 1 may be found at any case
temperature by using the appropriate curve on Figure 3.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limita-
tions imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc.
The safe level for these devices is specified as Reverse
Biased Safe Operating Area and represents the voltage–
current condition allowable during reverse biased turnoff.
This rating is verified under clamped conditions so that the
device is never subjected to an avalanche mode. Figure 2
gives the RBSOA characteristics.
1
0.8
SECOND BREAKDOWN
DERATING
POWER DERATING FACTOR
0.6
THERMAL
DERATING
0.4
0.2
0
25
45
65
85
105
125
TC, CASE TEMPERATURE (°C)
Figure 3. Power Derating
Table 1. RBSOA/V(BR)CEO(SUS) Test Circuit
0.02
µF
H.P. 214
OR EQUIV.
P.G.
+
0
≈
– 35 V
0.02
µF
50
500
100
T1
0V
–V
(ICpk
[
LcoilCC )
V
A
50
*IB
Vclamp
VCC
IB
V(BR)CEO
L = 10 mH
RB2 =
∞
VCC = 20 Volts
*Tektronix
*P–6042
or
*Equivalent
RBSOA
L = 200
µH
RB2 = 0
VCC = 20 Volts
RB1 selected for desired IB1
IB2
IB1
T.U.T.
MR856
+V
IC
*IC
L
T1
VCE
VCE(pk)
–V
IC(pk)
+ –
1
µF
RB2
2N5337
–
100
+ V
≈
11 V
2N6191
20
10
µF
RB1
A
T1 adjusted to obtain IC(pk)
Note: Adjust – V to obtain desired VBE(off) at Point A.
Motorola Bipolar Power Transistor Device Data
3
MJL16218
TYPICAL ELECTRICAL CHARACTERISTICS
1.0
IC/IB = 2.5
1.0
IC/IB = 5.0
100°C
100°C
V, VOLTAGE (V)
25°C
25°C
0.1
V, VOLTAGE (V)
0.1
0.01
0.1
1.0
IC, COLLECTOR CURRENT (A)
10
0.01
0.1
1.0
IC, COLLECTOR CURRENT (A)
10
Figure 4. Typical Collector–Emitter
Saturation Voltage
Figure 5. Typical Collector–Emitter
Saturation Voltage
10
V BE , BASE–EMITTER VOLTAGE (V)
V BE , BASE–EMITTER VOLTAGE (V)
IC/IB = 2.5
10
IC/IB = 5.0
1.0
25°C
100°C
1.0
25°C
100°C
0.1
0.1
1.0
IC, COLLECTOR CURRENT (A)
10
0.1
0.1
1.0
IC, COLLECTOR CURRENT (A)
10
Figure 6. Typical Emitter–Base
Saturation Voltage
Figure 7. Typical Emitter–Base
Saturation Voltage
4
Motorola Bipolar Power Transistor Device Data
MJL16218
TYPICAL ELECTRICAL CHARACTERISTICS (continued)
100
HFE = 2.0 V
H FE , DC CURRENT GAIN
100°C
25°C
10
H FE , DC CURRENT GAIN
100
HFE = 5.0 V
100°C
25°C
10
1.0
0.01
0.1
1.0
10
100
IC, COLLECTOR CURRENT (A)
1.0
0.01
0.1
1.0
10
100
IC, COLLECTOR CURRENT (A)
Figure 8. DC Current Gain
Figure 9. DC Current Gain
1.0
25°C
100°C
V, VOLTAGE (V)
VBE(on) = 5.0 V
0.1
0.1
1.0
IC, COLLECTOR CURRENT (A)
10
Figure 10. “On” Voltages
Motorola Bipolar Power Transistor Device Data
5
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