Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA • 95126• (408)295-9800tel • www.icst.com
PRELIMINARY INFORMATION
I C R O
C
LOC K
Pin Assignment
MK3723
X1
VDD
VIN
GND
1
2
3
4
8
7
6
5
X2
S1
VCXOCLK
S0
MK3723
Low Cost 3.3 Volt VCXO
Divider Select Table
S1
0
0
1
1
S0
0
1
0
1
VCXOCLK (MHz)
Crystal ÷2
Crystal ÷4
Crystal ÷6
Crystal ÷8
0 = connect directly to ground
1 = connect directly to VDD
8 pin (150 mil) SOIC
Pin Descriptions
Number
Name
Description
1
X1
Crystal connection. Connect to a pullable 10 to 20 MHz crystal.
2
VDD
VDD. Connect to + 3.3 V.
3
VIN
Voltage input to VCXO. Zero to 3.3 V analog input which controls the frequency of the VCXO.
4
GND
Connect to ground.
5
S0
Select pin for VCXO divider. See table above.
6
VCXOCLK VCXO clock output. Full CMOS output amplitude.
7
S1
Select pin for VCXO divider. See table above.
8
X2
Crystal connection. Connect to a pullable 16 to 28 MHz crystal.
Crystal Specifications
Correlation (load) capacitance
Initial accuracy
Drift over temperature and aging
C0/C1 ratio
ESR
14 pF
±20 ppm maximum
±50 ppm maximum
240 maximum
35
Ω
maximum
MDS 3723 A
2
Revision 082800
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA • 95126• (408)295-9800tel • www.icst.com
PRELIMINARY INFORMATION
I C R O
C
LOC K
Electrical Specifications
Parameter
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Operating Voltage, VDD
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD
Short Circuit Current
VIN, VCXO control voltage
Input Crystal Frequency
Input Crystal Accuracy
VCXO Output Clock Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Maximum Absolute Jitter, short term
Output frequency pullability, note 2
Notes:
Conditions
Referenced to GND
Referenced to GND
Max of 10 seconds
MK3723
Low Cost 3.3 Volt VCXO
Minimum
Typical
Maximum
7
VDD+0.5
70
260
150
3.45
0.4
Units
V
V
°C
°C
°C
V
V
V
V
mA
mA
V
MHz
ppm
MHz
ns
ns
%
ps
ppm
ABSOLUTE MAXIMUM RATINGS (note 1)
-0.5
0
-65
3.15
2.4
VDD-0.4
4
±50
0
16
2
0.8 to 2.0V
2.0 to 0.8V
At VDD/2
0V
≤
VIN
≤
3.3 V
3.3
28
±30
14
1.5
1.5
60
DC CHARACTERISTICS (VDD = 3.3 V unless noted)
IOH=-12mA
IOL=12mA
IOH=-4mA
No Load
AC CHARACTERISTICS (VDD = 3.3 V unless noted)
40
±100
50
100
±180
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With a ICS/MicroClock approved pullable crystal.
External Components
The MK3723 requires a minimum number of external components for proper operation. A decoupling
capacitor of 0.01µF should be connected between VDD and GND on pins 2 and 4, as close to the
MK3723 as possible. A series termination resistor of 33
Ω
may be used for the clock output. The input
crystal must be connected as close to the chip as possible. The input crystal should be a parallel mode,
pullable, AT cut, with 14 pF load capacitance. See previous page for crystal specifications. Consult ICS for
recommended suppliers. IMPORTANT - read application note MAN05 before laying out the PCB.
MDS 3723 A
3
Revision 082800
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA • 95126• (408)295-9800tel • www.icst.com
PRELIMINARY INFORMATION
I C R O
C
LOC K
MK3723
Low Cost 3.3 Volt VCXO
Package Outline and Package Dimensions
(
For current dimensional specifications, see JEDEC Publication No. 95.)
8 pin SOIC
Symbol
A
A1
B
C
D
E
e
H
h
L
Inches
Min
Max
0.0532 0.0688
0.0040 0.0098
0.0130 0.0200
0.0075 0.0098
0.1890 0.1968
0.1497 0.1574
.050 BSC
0.2284 0.2440
0.0099 0.0195
0.0160 0.0500
Millimeters
Min
Max
1.35
1.75
0.10
0.24
0.33
0.51
0.19
0.24
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.41
1.27
E
H
INDEX
AREA
D
A1
e
B
A
C
L
Ordering Information
Part/Order Number
MK3723S
MK3723STR
Marking
MK3723S
MK3723S
Shipping packaging
tubes
tape and reel
Package
8 pin SOIC
8 pin SOIC
Temperature
0-70 °C
0-70 °C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems Incorporated (ICS) assumes no responsibility for either its
use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is
intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does
not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 3723 A
4
Revision 082800
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA • 95126• (408)295-9800tel • www.icst.com
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
