MAX11960 Evaluation Kit
Evaluates: MAX11960
General Description
The MAX11960 evaluation kit (EV kit) demonstrates the
device’s, 20-bit, 1.0Msps, dual-channel, fully differential
SAR ADC with internal reference buffers. The EV kit
includes a graphical user interface (GUI) that provides
communication from Avnet’s ZedBoard™ development
board for the Xilinx Zynq
®
-7000 SoC. The ZedBoard
is not included with the EV kit and must be purchased
through Avnet.
The ZedBoard communicates with the PC through
an Ethernet cable using Windows
®
7, or Windows
8/8.1-compatible software.
The EV kit comes with the MAX11960ETP+ installed.
Benefits and Features
●
FMC Connector for Interface
●
75MHz SPI Clock Capability through FMC Connector
●
Sync In and Sync Out for Coherent Sampling
●
On-Board Input Buffers (MAX9632)
●
On-Board +3.0V Reference Voltage (MAX6126)
●
Windows 7, and Windows 8/8.1-Compatible Software
Ordering Information
appears at end of data sheet.
System Block Diagram
MAX9632
AMP
MAX9632
AMP
MAX9632
AMP
MAX9632
AMP
MAX9632
AMP
MAX9632
AMP
MAX9632
AMP
FPGA
MAX9632
AMP
REGULATED
POWER
MAX8510 (X5)
POWER ISOLATION
MAX13256
VOLTAGE
REFERENCE
MAX6126
INV + A
NONINV + A
INV - A
NONINV - A
INV + B
NONINV + B
INV - B
NONINV - B
ADC
MAX11960
DATA ISOLATION
MAX14935
ZedBoard is a trademark of ZedBoard.org.
Zynq is a registered trademark of Xilinx, Inc.
Windows, Windows XP, and Windows Vista are
registered trademarks and registered service marks of
Microsoft Corporation.
19-8486; Rev 0; 3/16
MAX11960 Evaluation Kit
Evaluates: MAX11960
Quick Start
Required Equipment
●
MAX11960 differential EV kit with SD card
●
ZedBoard development board
●
Windows PC
●
Ethernet cable
●
+20V/1A DC power supply or equivalent wall plug
●
Signal generator with differential outputs (e.g., Audio
Precision 2700 series)
●
Soldering iron and 2-pin 2.54mm header
Note:
In the following sections, software-related items are
identified by bolding. Text in
bold
refers to items directly
from the EV kit software. Text in
bold and underlined
refers to items from the Windows operating system.
4)
Verify that the ZedBoard’s jumpers JP7, JP8, and
JP11 have shunts installed at the GND position, and
JP9 and JP10 at the 3V3 position.
Move the shunt of J18 of the ZedBoard to the 3V3
position from 1V8.
Insert the SD card with the boot image (BOOT.bin).
Verify that all jumpers on the EV kit are in their default
positions, as shown in
Table 1.
Connect the ZedBoard to J2 on the EV kit for FMC
connection.
Connect the +20V DC power supply between +20V
and GNDA4 test points. If the power supply is unavailable,
a +20V wall plug can be inserted into the J3 connector
of the MAX11960 EV kit.
5)
6)
7)
8)
9)
Procedure
1)
10) Insert the +12V wall plug into the connect J20 of the
ZedBoard. Turn on the power to the ZedBoard.
11) Verify that the OLED screen on the ZedBoard
displays “MAX11960”.
12) Apply differential signals at test points INV+A and
INV-A, and at INV+B and INV-B.
13) Enable the function generators.
14) Open the EV kit GUI, MAX11960EVKit.exe and verify
that the status bar at the lower right corner displays
EV Kit Hardware Connected.
15) Select
MAX11960
from the
Device
Dropdown list
within the
System
tab sheet (Figure
1).
16) Click on the
Scope
(Figure
2)
or
FFT
(Figure
6)
tab
sheet and start capturing data by clicking the
Capture
button.
The EV kit is fully assembled and tested. Follow the steps
below to verify board operation:
Visit
http://www.maximintegrated.com/en/design/
tools/applications/evkit-software/
to download the
latest version of the EV kit software, 11960EVKit.ZIP.
Save the EV kit software to a temporary folder and
uncompress the ZIP file.
Solder the 2-pin header on J18-3V3 of the ZedBoard.
Connect the Ethernet cable from the PC to the ZedBoard
and configure the
Internet Protocol Version 4 (TCP/
IPv4)
properties in the local area connection to IP
address
192.168.1.2
and subnet mask to
255.255.255.0.
Note:
If an ethernet port is not available on the PC,
please use the option of ethernet to USB port adapter.
2)
3)
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MAX11960 Evaluation Kit
Evaluates: MAX11960
Table 1. Jumper Descriptions
JUMPER
SHUNT
POSITION
1-2
DESCRIPTION
Connects INV+A to GND for
noninverting configuration on
channel A of the MAX11960.
Connects to the output of the op
amp (U12).
Connects NONINV+A to GND
for inverting configuration on
channel A of the MAX11960.
Connects output of the op amp
(U10) to the negative input of the
op amp (U8).
GND the negative input of the op
amp (U8).
Connects output of the op amp
(U10) to positive input of the op
amp (U8).
GND the positive input of the op
amp (U8).
Connects REFA2 to positive
input of the op amp (U8).
Connects output of the op amp
(U8) to AIN+A.
Connects output of the op amp
(U13) to AIN+A.
Connects output of the op amp
(U7) to AIN-A.
Connects output of the op amp
(U14) to AIN-A.
Connects output of the op amp
(U13) to AIN+B.
Connects output of the op amp
(U8) to AIN+B.
Connects output of the op amp
(U14) to AIN-B.
Connects output of the op amp
(U7) to AIN-B.
Connects to REF offset.
Connects to REF/2 offset.
Connects to GND.
JU9
JU8
JU6
JU5
JUMPER
SHUNT
POSITION
1-2
DESCRIPTION
Connects NONINV-A to GND
for inverting configuration on
channel A of the MAX11960.
Connects to the output of the op
amp (U10).
Connects INV-A to GND for
noninverting configuration on
channel A of the MAX11960.
Connects REFA2 to positive
input of the op amp (U7).
GND the positive input of the op
amp (U7).
Connects output of the op amp
(U12) to positive input of the op
amp (U7).
GND the negative input of the op
amp (U7).
Connects output of the op amp
(U12) to the negative input of the
op amp (U7).
Connects INV+B to GND for
noninverting configuration on
channel B of the MAX11960.
Connects to the output of the op
amp (U16).
Connects NONINV+B to GND
for inverting configuration on
channel B of the MAX11960.
Connects output of the op amp
(U15) to the negative input of the
op amp (U3).
GND the negative input of the op
amp (13).
Connects output of the op amp
(U15) to positive input of the op
amp (U13).
GND the positive input of the op
amp (U13).
Connects REFB2 to positive
input of the op amp (U13).
JU1
3-4
3-4
5-6*
5-6*
1-2
3-4
JU2
5-6*
7-8
9-10
1-2*
3-4
5-6*
7-8
JU3
9-10*
11-12
13-14*
15-16
1-2
JU4
3-4*
5-6
1-2
3-4
5-6*
7-8
9-10
1-2
3-4
5-6*
1-2
3-4
5-6*
7-8
9-10
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MAX11960 Evaluation Kit
Evaluates: MAX11960
Table 1. Jumper Descriptions (continued)
JUMPER
SHUNT
POSITION
1-2
JU11
3-4*
5-6
1-2
JU12
3-4
5-6*
1-2
3-4
5-6*
7-8
9-10
1-2*
JU16
2-3
DESCRIPTION
Connects to REF offset.
Connects to REF/2 offset.
Connects to GND.
Connects NONINV-B to GND
for inverting configuration on
channel B of the MAX11960.
Connects to the output of the op
amp (U15).
Connects INV-B to GND for
noninverting configuration on
channel B of the MAX11960.
Connects REFB2 to positive
input of the op amp (U14).
GND the positive input of the op
amp (U14).
Connects output of the op amp
(U16) to positive input of the op
amp (U14).
GND the negative input of the op
amp (U14).
Connects output of the op amp
(U16) to the negative input of the
op amp (U14).
REFINAB connects to on-board
+3.0V reference.
User-supplied REFINAB. Apply
reference voltage at the EXT_
REFINAB test point.
Set isolator’s voltage level to
OVDDA
Set isolator’s voltage level to
OVDDB
Connects the SPI signals coming
from the FMC connectors to the
MAX11960.
User-supplied SPI. Connect
SPI signals at SCLK, CNVSTA,
CNVSTB, DINA, DINB, DOUA,
and DOUTB test points.
JU25
Not
installed
Install
JU30
Not
installed*
1-2*
2-3
JU23
JU20
JUMPER
SHUNT
POSITION
Not
installed*
Installed
1-2, 3-4*
JU22
Not
installed
DESCRIPTION
Enables line driver.
Disables line driver.
DVDDA and DVDDB supplies
connects to on-board +1.8V
LDO.
User-supplied DVDDA and
DVDDB. Apply +1.8V at the
DVDDA and DVDDB test points.
OVDDA and OVDDB supplies
connects to on-board +1.8V
LDO.
OVDDA and OVDDB supplies
connects to on-board +3.3V
LDO.
User-supplied OVDDA and
OVDDB. Apply +1.8V to +3.3V
at the OVDDA and OVDDB test
points.
AVDDA and AVDDB supplies
connects to on-board +1.8V
LDO.
User-supplied AVDDA and
AVDDB. Apply +1.8V at the
AVDDA and AVDDB test points.
REFVDDA and REFVDDB
supplies connects to on-board
+3.3V LDO.
User-supplied REFVDDA and
REFVDDB. Apply +3.3V at the
REFVDDA and REFVDDB test
points.
Do not use.
User-supplied +20V power-
supply header connection.
Enabled MAX13256 (U2)
Disable MAX13256 (U2)
1-3, 2-4*
3-5, 4-6
JU13
Not
installed
1-2, 3-4*
JU24
Not
installed
1-2, 3-4*
1-2*
JU17
2-3
1-2, 4-5,
7-8, 16-17,
19-20,
22-23,
25-26*
Not
installed
JU18
JU31
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MAX11960 Evaluation Kit
Evaluates: MAX11960
Table 1. Jumper Descriptions (continued)
JUMPER
SHUNT
POSITION
1-2
3-4*
JU33
1-2
3-4*
1-2, 7-8
JU34
3-4, 5-6*
DESCRIPTION
User-supplied +24V power-
supply connection.
Isolated +24V from MAX13256
User-supplied -24V power-supply
connection.
Isolated -24V from MAX13256
User-supplied +15V supply to
analog front-end op amps.
Isolated +15V supply to analog
front-end op amps and LDO.
*Default position.
1-2
JU36
3-4*
JU35
JUMPER
SHUNT
POSITION
1-2
3-4
5-6*
DESCRIPTION
GND the negative supply of the
analog front-end op amps.
User-supplied -15V supply to
analog front-end op amps.
Isolated -15V supply to analog
front-end op amps.
User-Supplied +5V to LDOs
that powers the supplies on the
MAX11960.
+5V supply to LDOs that powers
the supplies on the MAX11960.
JU32
The main window of the MAX11960 EV kit software contains
six tabs:
System, Scope, DMM,
Histogram, FFT,
and
Register Settings.
General Description of Software
priately selected, the description of the ADC will change
accordingly. The Reference Voltage dropdown list is
adjustable. Please see the MAX11960 data sheet for
detailed specification of the reference voltage range.
The right-side of the tab sheet reads a single conversion in
LSB and decimal. An additional feature is the ADC calibration.
The
Scope
tab sheet is used to capture data and display
it in the time domain. Sampling rate and number of
samples can also be set in this tab if they were not
adjusted appropriately in other tabs. The
Display Unit
drop-down list allows counts and voltages. Below the
graph, the user can select to display
Channel A
and/or
Channel B.
Once the desired configuration is set, click
on the
Capture
button. The right-side of the tab sheet
displays details of the waveform, such as
Average,
Standard
Deviation,
Maximum, Minimum,
and
Fundamental Frequency.
Figure 2
displays data of both ADCs when differential
sinusoidal are applied at the inputs on the EV kit.
System Tab
The System tab is an overview of the evaluation system. The
left side displays Sampling Rate, Number of Samples,
Clock Source, and Sync-Out CLK for the coherent
sampling feature. For the Clock Source selection, the
ZedBoard internal clock is always a valid option. If the
External Sync-In is selected, then an external clock must
be applied at the DCLK_IN SMA on the EV kit. The Sync-
Out CLK selection is used to synchronize the signal generator
with a 10MHz input. See the
Sync Input and Sync Output
section for more information.
The center of the tab sheet displays a block diagram and
the description of the installed ADC: Device, Resolution,
Input Range, Reference Voltage, and Max Sampling
Rate. The Device dropdown list provides the selection
between Maxim’s 16-, 18-, and 20-bit parts. Once appro-
Scope Tab
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