19-2058; Rev 0; 5/01
MAX1420 Evaluation Kit
General Description
The MAX1420 evaluation kit (EV kit) is a fully assembled
and tested circuit board that contains all the compo-
nents necessary to evaluate the performance of the
MAX1420, MAX1421, or MAX1422, 12-bit, +3.3V, ana-
log-to-digital converters (ADCs). The MAX1420/
MAX1421/MAX1422 ADCs accept 2Vp-p differential
analog inputs. The offset binary digital output produced
by the ADC can be easily sampled with a user-provided
high-speed logic analyzer or data-acquisition system.
The EV kit comes with the 60Msps part (MAX1420)
installed. Order a free sample of the MAX1421CCM or
MAX1422CCM to evaluate the 40Msps or 20Msps parts.
o
Up to 60Msps Sampling Rate
o
Low Voltage, Low Power Operation
o
Clock-Shaping Circuitry
o
Easy Data Capture Configuration
o
Fully Assembled and Tested
Features
Evaluates: MAX1420/MAX1421/MAX1422
Ordering Information
PART
MAX1420EVKIT
TEMP RANGE
0°C to +70°C
IC PACKAGE
48 TQFP
Component List
DESIGNATION
QTY
DESCRIPTION
1.0µF, 16V, X7R, 1206 ceramic
capacitors
Taiyo Yuden EMK316BJ105KF
Murata GRM42-6X7R105K016
TDK C3216X7R1C105M
10µF, 6.3V, X5R, 1206 ceramic
capacitors
Taiyo Yuden JMK316BJ106KL
Murata GRM42-6X5R106K6.3
TDK C3216X5R0J106K
0.1µF, 16V, X7R, 0603 ceramic
capacitors
Taiyo Yuden EMK107BJ104KA
Murata GRM39X7R104K016
TDK C1608X7R1C104K
DESIGNATION
C36, C37, C55,
C57, C59, C60
C40
C49
QTY
0
1
1
DESCRIPTION
Not installed
0.01µF, 50V, X7R, 0603 ceramic
capacitor
2200pF, 50V, X7R, 0603 ceramic
capacitor
1.0µF, 10V, X7R, 0805 ceramic
capacitors
Taiyo Yuden LMK212BJ105KG
Murata GRM40X7R105K010
TDK C2012X7R1A105K
2
✕
13-pin header
SMA connectors, vertical PC-
mount
3-pin headers
Not installed
Ferrite chip beads, 1206
Fair-Rite Products Corp.
2512069007Y0
10Ω ±5%, 1206 resistors
49.9Ω ±1%, 0603 resistors
100Ω ±1%, 0603 resistors
C1, C3, C39,
C52
4
C2, C4, C38
3
C54, C58
2
C5, C7, C10,
C14, C16, C18,
C19, C29, C31,
C33, C46, C50
C6, C8, C9,
C11, C13, C15,
C17, C20, C22,
C24, C26, C28,
C30, C32, C34,
C42, C51, C53
C12, C21, C23,
C25, C27, C41,
C47, C48, C56
C35, C43, C44,
C45
J1
J2, J3
JU1, JU2
JU3
1
2
2
0
3
2
18
12
12
18
1000pF, 50V, X7R, 0402 ceramic
capacitors
L1, L2, L3
R1, R2
9
0.22µF, 10V, X7R, 0603 ceramic
capacitors
Taiyo Yuden LMK107BJ224KA
Murata GRM39X7R224K010
22pF, 50V, COG, 0402 ceramic
capacitors
R3, R4, R5,
R18, R23,
R28–R40
R6–R17
4
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX1420 Evaluation Kit
Evaluates: MAX1420/MAX1421/MAX1422
Component List (continued)
DESIGNATION
R19, R20, R24,
R25
R21, R22, R26,
R27
R41
R42
R43
QTY
4
4
1
1
0
DESCRIPTION
10kΩ ±5%, 0805 resistors
24.9Ω ±1%, 0805 resistors
820Ω ±1%, 0805 resistor
620Ω ±1%, 0805 resistor
Resistor not installed
(short PC trace)
RF transformers
Mini-Circuits T1-1T-KK81
Coilcraft WB2010-1-SM
MAX1420CCM, 48-pin TQFP
16-bit buffer/driver three-state
output, 48-pin TSSOP
IDT 74ALVC16244APA
Texas Instruments
SN74ALVCH16244ADGGR
Quick Start
• DC power supplies
Digital (+3.3V, 100mA)
Analog (+3.3V, 100mA)
• Function generator with low-phase noise and low-
jitter for clock input (e.g., HP 8662A or equivalent)
• Function generator for analog signal input (e.g., HP
8662A or equivalent)
• Logic analyzer or data-acquisition system (e.g., HP
1663EP, HP 16500C or equivalent)
• Bandpass filter selected for the input frequency of
interest (e.g., TTE Q56 series or equivalent)
The MAX1420 EV kit is fully assembled and tested.
Follow the steps below to verify board operation.
Do not turn on the power supply until all connec-
tions are completed.
1) Verify that the shunts are installed in the following
positions:
JU1 (2-3)
JU2 (2-3)
2) Connect the clock function generator to the CLKIN
SMA connector.
T1, T2
U1
2
1
U2
1
Component Suppliers
SUPPLIER
Coilcraft
Fair-Rite Products
IDT
Mini-Circuits
Murata
Taiyo Yuden
TDK
Texas Instruments
PHONE
847-639-6400
888-324-7748
800-345-7015
718-934-4500
814-237-1431
408-573-4150
847-803-6100
972-644-5580
FAX
847-639-1469
888-337-7483
408-492-8674
718-934-7092
814-238-0490
408-573-4159
847-803-6296
214-480-7800
3) Connect the output of the analog signal function gen-
erator to the input of the bandpass filter.
4) Connect the output of the filter to the analog input
SMA connector (VIN) of the MAX1420 EV kit.
5) Connect the logic analyzer to the square pin header
(J1), where D11 is the MSB and D0 is the LSB.
6) Connect a +3.3V power supply to AVDD and VS+.
Connect the ground terminal of this supply to AGND.
7) Connect a +3.3V power supply to DVDD1. Connect
the ground terminal of this supply to DGND.
8) Turn on both power supplies.
9) Enable the function generators. Set the clock func-
tion generator to 2V
p-p
and frequency
≤
60MHz. Set
the analog signal function generator to 2V
p-p
and the
desired frequency. The function generators should
be phase locked to ensure optimum performance.
10) Set the logic analyzer to capture data on the rising
edge of the clock.
11) Collect and evaluate the data using the logic
analyzer.
Part Selection Table
PART
MAX1420CCM
MAX1421CCM
MAX1422CCM
SPEED (Msps)
60
40
20
2
_______________________________________________________________________________________
MAX1420 Evaluation Kit
Detailed Description
The MAX1420 EV kit is a fully assembled and tested
circuit board that contains all the components neces-
sary to evaluate the performance of the MAX1420,
MAX1421, or MAX1422, 12-bit ADC at a maximum
clock frequency of 60MHz. The EV kit is designed
using a four-layer architecture, to optimize the perfor-
mance of the MAX1420. Separate, nonoverlapping,
analog and digital power planes minimize noise cou-
pling between analog and digital signals.
For simple operation, the EV kit is specified to have
+3.3V power supplies applied to analog and digital
power planes. However, the digital supply can be oper-
ated down to +2.7V without compromising the board’s
performance. The logic analyzer’s threshold should be
adjusted accordingly.
Access to the digital outputs and the capture clock is
provided through connector J1. The 26-pin connector
interfaces directly to a user-provided logic analyzer or
data-acquisition system.
signal is applied to the input pins (INP and INN) of the
MAX1420. Both input pins receive half of the input sig-
nal swing applied at the SMA connector VIN centered
at (VS+/2).
Evaluates: MAX1420/MAX1421/MAX1422
MAX1420 Enable and Power-Down
The MAX1420 EV kit features jumpers to enable and
power-down the MAX1420 (JU1) or enable/disable its
digital outputs (JU2). See Table 1 for jumper settings.
Voltage Reference
The MAX1420 requires a voltage reference to set the
full-scale analog input range. The MAX1420 provides
three modes of operation to set the reference voltage.
In internal reference mode, the on-chip +2.048V
bandgap reference is used. The pads CMLT, REFNT,
REFPT, and REFIN must be left floating in this mode. In
buffered external reference mode, a stable and accu-
rate voltage must be applied at the REFIN pad to set
the reference voltage. The pads CMLT, REFNT, and
REFPT must be left floating in this mode. Connecting
REFIN to AGND activates the unbuffered external refer-
ence mode. In this mode, the full-scale input range is
determined by the voltage difference (V
DIFF
) between
the pads REFPT and REFNT. In this mode, CMLT must
be biased between +1.568V to +1.733V. REFPT and
REFNT should be biased to V
CMLT
+ (V
DIFF
/2) and
V
CMLT
- (V
DIFF
/2), respectively.
Power Supplies
The MAX1420 EV kit requires separate analog and digi-
tal power supplies for best performance. A +3.3V
power supply is used to power the analog portion
(AVDD) of the MAX1420/MAX1421/MAX1422. A second
separate +3.3V power supply is used to power the digi-
tal portion (DVDD1) of the MAX1420 and the buffer/dri-
ver, but it will work with a supply as low as +2.7V and
as high as +3.6V. Enhanced dynamic performance can
be achieved when the digital supply voltage is lower
than the analog supply voltage.
Output Buffer/Driver
The 74ALVC16244 buffers the MAX1420’s digital out-
puts, and is able to drive capacitive loads without com-
promising the MAX1420’s dynamic performance. The
outputs of the buffer are connected to a 26-pin header
(J1) located on the right side of the EV kit, where the
user can connect a logic analyzer or data-acquisition
system.
Input Signal
The MAX1420 EV kit requires a single-ended analog
input signal. This single-ended signal is converted to a
differential signal by transformer T1. This differential
Clock
The MAX1420 EV kit requires a single-ended sinusoidal
clock input signal. This single-ended signal is convert-
ed to a differential signal by transformer T2. The differ-
ential signal is then applied to the clock pins (CLK and
CLK)
of the MAX1420. The clock frequency determines
the sampling rate of the MAX1420. The frequency
should be between 100kHz and 60MHz. The clock sig-
nal is also connected through the 74ALVC16244 to the
26-pin header J1, to be used by a logic analyzer or
data-acquisition system.
Table 1. Jumper JU1 and JU2 Functions
JUMPER
SHUNT
LOCATION
1-2
2-3
1-2
JU2
2-3
Digital outputs D0–D11
enabled
FUNCTION
MAX1420 in power-down
mode
MAX1420 operational
Digital outputs D0–D11
disabled (high impedance)
JU1
_______________________________________________________________________________________
3
Evaluates: MAX1420/MAX1421/MAX1422
DVDD
CMLT
REFNT
L1
JU3
DVDD1
R3
49.9Ω
R4
49.9Ω
AVDD
DGND
B–DGND
DVD
1
2
JU2
R6
100Ω
26 4A4
R7
100Ω
48
AGND
36
29 4A2
30
4A1
20
R30
49.9Ω
J1–21
R31
49.9Ω
4Y1
19
J1–19
R32
49.9Ω
3Y4
17
J1–17
16
3Y3
C60
OPEN
R33
49.9Ω
J1–26
J1–15 J1–24
J1–22
R34
49.9Ω
B–DGND
28
R12
100Ω
R13
100Ω
27
38
J1–13
9
2A3
2Y2
40
R14
100Ω
D3
26
R15
100Ω
D2
AVDD
DGND
15
21
22
C15
1000pF
18
AVDD
CLK
AGND
AVDD
DVDD
AGND
CLK
D0
23
D1
24
25
R16
100Ω
R17
100Ω
C16
0.1µF
DVD
R35
49.9Ω
J1–11
8
2A2
41
2Y1
R36
49.9Ω
J1–9
6
2A1
43
1Y4
R37
49.9Ω
J1–7
5
1A4
44
1Y3
R38
49.9Ω
J1–5
R39
49.9Ω
1A3
1Y2
46
1A3
1Y1
GND
4OE
DVDD
C59
OPEN
B–DGND
AVDD
R26
24.9Ω
AVDD
L3
R24
10kΩ
5%
4
5
6
C48
0.22µF
R25
10kΩ
5%
C42
1000pF
R27
24.9Ω
T2
3
B–DGND
2
1
J3
CLKIN
R23
49.9Ω
R42
620Ω
C58
1µF
CLKIN
C51
1000pF
R41
820Ω
47
1A1
GND
GND
GND
1OE
3
J1–3
2
15
24
10
21
4
1
B–DGND
R40
49.9Ω
J1–1
J1–4
J1–2
J1–10
J1–8
J1–6
J1–16
J1–14
J1–12
J1–20
J1–18
4Y3
22
R29
49.9Ω
J1–23
R9
100Ω
R10
100Ω
32
3A4
4Y2
R11
100Ω
33
3A3
3OE
25
DVDD
AGND
32
1
AGND
D8
2
AVDD
AVDD
33
D7
34
AVDD
C33
0.1µF
4
AGND
D6
5
T1
INP
5
C35
22pF
R22
24.9Ω
7
C36
OPEN
8
AGND
D5
DGND
INN
DGND
30
C17
1000pF
C18
0.1µF
DVDD
4
C37
OPEN
6
6
R21
24.9Ω
C34
1000pF
3
35
C31
0.1µF
C32
1000pF
AVDD
CML
REFN
REFP
REFIN
AVDD
AGND
PD
OE
D11 D10
D9
R8
100Ω
J1–25
47
46
45
44
43
42
41
40
39
38 37
27
4A3
R28
49.9Ω
B–DGND
C49
2200pF
C50
0.1µF
7
V
CC
18
V
CC
42
V
CC
31
V
CC
23
4Y4
3
3
1
2
U2
74ALVCH16244A
C27
0.22µF
C25
0.22µF
C23
0.22µF
C21
0.22µF
C19
0.1µF
DVDD
R5
49.9Ω
AVDD
C29
0.1µF
C4
10µF
C3
1µF
C54
1µF
C55 R2
OPEN 10Ω
5%
R1
10Ω
5%
REFPT
REFIN
C52
1µF
DVD
NOTES:
1. ALL RESISTORS ARE 1% UNLESS OTHERWISE SPECIFIED.
AVDD
C1
1µF
C2
10µF
C30
1000pF
C26
1000pF
JU1
C24
1000pF
C22
1000pF
C20
1000pF
C28
1000pF
MAX1420 Evaluation Kit
Figure 1. MAX1420 EV Kit Schematic
C56
0.22µF
C57
OPEN
AGND
J2
C53
1000pF
VIN
1
U1
MAX1420
31
DVDD
R18
49.9Ω
2
3
28
GND
34
GND
39
GND
35
3A2
36
3A1
37
2A4
45
GND
46
2OE
VS+
9
AGND
D4
C6
1000pF
10
AVDD
AVDD
11
C7
0.1µF
12
AGND
AGND
13
14
C9
1000pF
C46
0.1µF
C43
22pF
C47
0.22µF
C12
0.22µF
C14
0.1µF
16
C11
1000pF
17
C44
22pF
19
20
C45
C13
22pF 1000pF
C8
1000pF
C40
0.01µF
C5
0.1µF
C41
0.22µF
R19
10kΩ
5%
14
3Y2
13
3Y1
12
2Y4
11
2Y3
C38
10µF
C39
1µF
R20
10kΩ
5%
AVDD
R43
SHORT
(PC TRACE)
C10
0.1µF
L2
4
_______________________________________________________________________________________________________
_______________________________________________________________________________________
B–DGND
4
MAX1420 Evaluation Kit
Evaluates: MAX1420/MAX1421/MAX1422
Figure 2. MAX1420 EV Kit Component Placement Guide—
Component Side
Figure 3. MAX1420 EV Kit PC Board Layout—Component Side
Figure 4. MAX1420 EV Kit PC Board Layout—Solder Side
Figure 5. MAX1420 EV Kit Component Placement Guide—
Solder Side
5
_______________________________________________________________________________________
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