UM10413
MPT612 User manual
Rev. 1 — 16 December 2011
User manual
Document information
Info
Keywords
Abstract
Content
ARM, ARM7, embedded, 32-bit, MPPT, MPT612
This document describes all aspects of the MPT612, an IC designed for
applications using solar photovoltaic (PV) cells, or fuel cells.
NXP Semiconductors
UM10413
MPT612 User manual
Revision history
Rev
1
Date
20111216
Description
initial version
Contact information
For more information, please visit:
http://www.nxp.com
For sales office addresses, please send an email to:
salesaddresses@nxp.com
UM10413
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
User manual
Rev. 1 — 16 December 2011
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NXP Semiconductors
UM10413
MPT612 User manual
1. Introduction
The MPT612 is the first dedicated IC performing Maximum Power Point Tracking (MPPT)
designed for applications using solar photovoltaic (PV) cells, or fuel cells. To simplify
development and maximize system efficiency, the MPT612 is supported by:
•
a patent-pending MPPT algorithm
•
an application-specific software library
•
easy-to-use application programming interfaces (APIs)
Dedicated hardware functions for PV panels, including voltage and current measurement
and panel parameter configuration, simplify design and speed development.
MPT612 is based on a low-power ARM7TDMI-S RISC core operating up to 70 MHz
achieving overall system efficiency ratings up to 98 %. It controls the external switching
device through a signal derived from a patent-pending MPPT algorithm which delivers up
to 99.5% Maximum Power Point Tracking (MPPT) efficiency. The solar PV DC source can
be connected to the IC through appropriate voltage and current sensors. The IC
dynamically extracts the maximum power from the PV panel without user intervention
when enabled. The IC can be configured for boundary conditions set in software. There is
up to 15 kB of flash memory available for application software.
In this user manual, solar PV terminology is primarily used as an example. However, the
MPT612 is equally useful for fuel cells or any other DC source which has MPP
characteristics.
2. Features
•
ARM7TDMI-S 32-bit RISC core operating at up to 70 MHz
•
128-bit wide interface and accelerator enabling 70 MHz operation
•
10-bit ADC providing:
–
Conversion times as low as 2.44
s
per channel and dedicated result registers
minimize interrupt overhead
–
Five analog inputs available for user-specific applications
•
One 32-bit timer and external event counter with four capture and four compare
channels
•
One 16-bit timer and external event counter with four compare channels
•
Low-power Real-Time Clock (RTC) with independent power supply and dedicated
32 kHz clock input
•
Serial interfaces including:
–
Two UARTs (16C550)
–
Two Fast I
2
C-buses (400 kbit/s)
–
SPI and SSP with buffering and variable data length capabilities
•
Vectored interrupt controller with configurable priorities and vector addresses
•
Up to 28, 5 V-tolerant fast general-purpose I/O pins
•
Up to 13 edge- or level-sensitive external interrupt pins available
UM10413
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
User manual
Rev. 1 — 16 December 2011
3 of 268
NXP Semiconductors
UM10413
MPT612 User manual
•
Three levels of flash Code Read Protection (CRP)
•
70 MHz maximum clock available from programmable on-chip PLL with input
frequencies between 10 MHz and 25 MHz and a settling time of 100 ms
•
Integrated oscillator operates with an external crystal at between 1 MHz and 25 MHz
•
Power-saving modes include:
–
Idle mode
–
Two Power-down modes; one with the RTC active and with the RTC deactivated
•
Individual enabling/disabling of peripheral functions and peripheral clock scaling for
additional power optimization
•
Processor wake-up from Power-down and Deep power-down mode using an external
interrupt or the RTC
•
In-System/In-Application Programming (ISP/IAP) via on-chip bootloader software.
Single flash sector or full chip erase in 100 ms and programming of 256 bytes in 1 ms
3. Applications
•
Battery charge controller for solar PV power and fuel-cells. The use cases are
–
Battery charging for home appliances such as lighting, DC fans, DC TV, DC motors
or any other DC appliance
–
Battery charging for public lighting and signaling, such as: LED street lighting,
garden/driveway lighting, dusk-to-dawn lighting, railway signaling, traffic signaling,
remote telecom terminals/towers
–
Battery charging for portable devices
•
DC-to-DC converter per panel to provide improved efficiency
•
Micro inverter per panel removes the need for one large system inverter
4. Device information
Table 1.
MPT612 device information
Flash memory
32 kB
RAM
8 kB
ADC
8 inputs
Temperature
range (C)
40
to +85
Type number
MPT612FBD48
5. Architectural overview
The MPT612 comprises:
•
•
•
•
ARM7TDMI-S CPU with emulation support
ARM7 Local Bus for interface to on-chip memory controllers
AMBA Advanced High-performance Bus (AHB) to interface the interrupt controller
ARM Peripheral Bus (APB, a compatible superset of ARM AMBA Advanced
Peripheral Bus) for connecting on-chip peripheral functions
The MPT612 configures the ARM7TDMI-S processor core in little endian byte order.
UM10413
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
User manual
Rev. 1 — 16 December 2011
4 of 268
NXP Semiconductors
UM10413
MPT612 User manual
AHB peripherals are allocated a 2 MB range of addresses at the top of the 4 GB ARM
memory space. Each AHB peripheral is allocated a 16 kB address space within the AHB
address space. A pin connect block controls on-chip peripheral connections to device pins
(see
Section 12.4 “Register description” on page 62)
configured by software to specific
application requirements for the use of peripheral functions and pins.
5.1 ARM7TDMI-S processor
The ARM7TDMI-S is a general purpose 32-bit processor core offering high performance
and very low-power consumption. The ARM architecture is based on Reduced Instruction
Set Computer (RISC) principles making the instruction set and decode mechanisms much
simpler than micro programmed Complex Instruction Set Computers (CISC). This
simplicity results in a high instruction throughput and impressive real-time interrupt
response from a small, cost-effective processor core.
Pipeline techniques are employed ensuring all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed, its
successor is being decoded and a third instruction is being read from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb making it suitable for high-volume applications with memory restrictions, or
applications where code density is an issue.
The key idea behind Thumb is a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
•
the standard 32-bit ARM set
•
the 16-bit Thumb set
The Thumb 16-bit instruction sets allow up to twice the density of standard ARM code
while retaining most of the performance advantage of ARM over a traditional 16-bit
processor using 16-bit registers, made possible using the ARM code 32-bit register set.
Thumb code provides up to 65 % of standard ARM code and 160 % of the performance of
an equivalent ARM processor connected to a 16-bit memory system.
The particular flash implementation in the MPT612 also allows full speed execution in
ARM mode. Programming performance-critical and short code sections in ARM mode is
recommended. The impact on the overall code size is minimal but the speed can increase
by 30 % over Thumb mode.
5.2 On-chip flash memory system
The MPT612 incorporates a 32 kB flash memory system. This memory can be used for
both code and data storage. Various methods can be used to program flash memory, such
as using:
•
•
•
•
the built-in JTAG interface
In Systems Programming (ISP)
UART
In Application Programming (IAP)
UM10413
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
User manual
Rev. 1 — 16 December 2011
5 of 268
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