Digital Design
Using Digilent FPGA Boards
VHDL / Active-HDL
Edition
Table of Contents
1. Introduction
1.1 Background
1.2 Digital Logic
1.3 VHDL
2. Basic Logic Gates
2.1 Truth Tables and Logic Equations
The Three Basic Gates
Four New Gates
2.2 Positive and Negative Logic: De Morgan’s Theorem
2.3 Sum of Products Design
2.4 Product of Sums Design
VHDL Examples
Example 1: 2-Input Gates
Example 2: Multiple-Input Gates
Problems
3. Boolean Algebra and Logic Equations
3.1 Boolean Theorems
One-Variable Theorems
Two- and Three-Variable Theorems
3.2 Karnaugh Maps
Two-Variable K-Maps
Three-Variable K-Maps
Four-Variable K-Maps
3.3 Computer Mimimization Techniques
Tabular Representations
Prime Implicants
Essential Prime Implicants
VHDL Examples
Example 3 – Majority Circuit
Example 4 – 2-Bit Comparator
Problems
4. Implementing Digital Circuits
4.1 Implementing Gates
4.2 Transistor-Transistor Logic (TTL)
4.3 Programmable Logic Devices (PLDs and CPLDs)
A 2-Input, 1-Output PLD
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The GAL 16V8
CPLDs
4.4 Field Programmable Gate Arrays (FPGAs)
VHDL Examples
Example 5 – Map Report
Problems
5. Combinational Logic
5.1 Multiplexers
2-to-1 Multiplexer
4-to-1 Multiplexer
Quad 2-to-1 Multiplexer
VHDL Examples
Example 6 – 2-to-1 Multiplexer:
if
Statement
Example 7 – 4-to-1 Multiplexer:
port map
Statement
Example 8 – 4-to-1 Multiplexer:
case
Statement
Example 9 – A Quad 2-to-1 Multiplexer
Example 10 – Generic Multiplexer: Parameters
Example 11 – Glitches
5.2 7-Segment Displays
VHDL Examples
Example 12 – 7-Segment Decoder: Logic Equations
Example 13 – 7-Segment Decoder:
case
Statement
Example 14 – Multiplexing 7-Segment Displays
Example 15 – 7-Segment Displays:
x7seg
and
x7segb
5.3 Code Converters
Binary-to-BCD Converters
Shift and Add 3 Algorithm
Gray Code Converters
VHDL Examples
Example 16 – 4-Bit Binary-to-BCD Converter: Logic Equations
Example 17 – 8-Bit Binary-to-BCD Converter:
for
Loops
Example 18 – 4-Bit Binary to Gray Code Converter
Example 19 – 4-Bit Gray Code to Binary Converter
5.4 Comparators
Cascading Comparators
TTL Comparators
VHDL Examples
Example 20 – 4-Bit Comparator Using a VHDL Procedure
Example 21 –
N-Bit
Comparator Using Relational Operators
5.5 Decoders and Encoders
Decoders
TTL Decoders
Encoders
Priority Encoders
TTL Encoders
VHDL Examples
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Example 22 – 3-to-8 Decoder: Logic Equations
Example 23 – 3-to-8 Decoder:
for
Loops
Example 24 – 8-to-3 Encoder: Logic Equations
Example 25 – 8-to-3 Encoder:
for
Loops
Example 26 – 8-to-3 Priority Encoder
Problems
6. Arithmetic Circuits
6.1 Adders
Half Adder
Full Adder
Carry and Overflow
TTL Adder
VHDL Examples
Example 27 – 4-Bit Adder: Logic Equations
Example 28 – 4-Bit Adder: Behavioral Statements
Example 29 –
N-Bit
Adder: Behavioral Statements
6.2 Subtractors
Half Subtractor
Full Subtractor
An Adder/Subtractor Circuit
VHDL Examples
Example 30 – 4-Bit Adder/Subtractor: Logic Equations
Example 31 –
N-Bit
Subtractor: Behavioral Statements
6.3 Shifters
VHDL Examples
Example 32 – 4-Bit Shifter
6.4 Multiplication
Binary Multiplication
Signed Multiplication
VHDL Examples
Example 33 – Multiplying by a Constant
Example 34 – A 4-Bit Multiplier
The Multiplication Operator
6.5 Division
Binary Division
VHDL Examples
Example 35 – An 8-Bit Divider using a Procedure
6.6 Arithmetic Logic Unit (ALU)
VHDL Examples
Example 36 – 4-Bit ALU
Problems
7. Sequential Logic
7.1 Latches and Flip-Flops
SR Latch
Clocked SR Latch
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7.2
7.3
7.4
7.5
7.6
D Latch
Edge-Triggered D Flip-Flop
VHDL Examples
Example 37 – Edge-Triggered D Flip-Flop
Example 38 – Edge-Triggered D Flip-Flop with Set and Clear
Example 39 – D Flip-Flops in VHDL
Example 40 – D Flip-Flop with Asynchronous Set and Clear
Example 41 – Divide-by-2 Counter
Registers
VHDL Examples
Example 42 – 1-Bit Register
Example 43– 4-Bit Register
Example 44 –
N-Bit
Register
Shift Registers
4-Bit Ring Counter
VHDL Examples
Example 45 – Shift Registers
Example 46 – Ring Counter
Example 47 – Debounce Pushbuttons
Example 48 – Clock Pulse
Counters
Arbitrary Waveform
VHDL Examples
Example 49 – 3-Bit Counter
Example 50 – Modulo-5 Counter
Example 51 –
N-Bit
Counter
Example 52 – Clock Divider: Modulo-10K Counter
Example 53 – Arbitrary Waveform
Pulse-Width Modulation (PWM)
Controlling the Speed of a DC Motor using PWM
Controlling the Position of a Servo using PWM
VHDL Examples
Example 54 – Pulse-Width Modulation (PWM)
Example 55 – PWM Signal for Controlling Servos
BASYS/Nexys-2 Board Examples
VHDL Examples
Example 56 – Loading Switch Data into a Register
Example 57 – Shifting Data into a Shift Register
Example 58 – Scrolling the 7-Segment Display
Example 59 – Fibonacci Sequence
Problems
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8. Finite State Machines
8.1 Mealy and Moore State Machines
8.2 A Moore Machine Sequence Detector
8.3 Mealy Machine Sequence Detector
VHDL Examples
Example 60 – Sequence Detector
Example 61 – Door Lock Code
VHDL Package
Example 62 – Traffic Lights
Problems
9. Datapaths and Control Units
9.1 VHDL
while
Statement
Example 63 – GCD Algorithm – Part 1
9.2 Datapaths and Control Units
Example 64 – GCD Algorithm – Part 2
Example 65 – An Integer Square Root Algorithm
Square Root Control Unit
10. Integrating the Datapath and Control Unit
Example 66 –GCD Algorithm – Part 3
Example 67 – Integer Square Root– Part 2
11. Memory
Example 68 – A VHDL ROM
Example 69 – Distributed RAM/ROM
Example 70 – Block RAM/ROM
12. VGA Controller
Example 71 – VGA-Stripes
Example 72 – VGA-PROM
Example 73 – Sprites in Block ROM
Example 74 – Screen Saver
13. PS/2 Port
Example 75 – Keyboard
Example 76 – Mouse
Appendix A
– Aldec Active-HDL Tutorial
Part 1: Project Setup
Part 2: Design Entry
Part 3: Simulation
Part 4: Creating a Top-level Design
Part 5: Synthesis and Implementation
Part 6: Program FPGA Board
Appendix B
– Number Systems
B.1 Counting in Binary and Hexadecimal
B.2 Positional Notation
B.3 Fractional Numbers
B.4 Number System Conversions
B.5 Negative Numbers
Appendix C
– Making a Turnkey System
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