MN101C39C
Type
Internal ROM type
ROM (byte)
RAM (byte)
Package (Lead-free)
Minimum Instruction
Execution Time
MN101C39C
Mask ROM
48K
2K
TQFP080-P-1212D
0.1
µs (at
4.5
V to
5.5
V,
20
MHz)
0.25
µs (at
2.7
V to
5.5
V,
8
MHz)
125
µs (at
2.0
V to
5.5
V,
32
kHz)*
* The lower limit for operation guarantee for EPROM built-in type is
2.3
V.
MN101CP39C
EPROM
Interrupts
RESET, Watchdog, External
0
to
4,
Timer
2
to
5,
Time base, Serial
0,
Serial
1,
A/D conversion finish
Timer counter
2
:
8-bit
×
1
(square-wave/8-bit PWM output, event count, synchronous output event)
Clock source................
1/1, 1/4
of system clock frequency;
1/1
of XI oscillation clock frequency; external clock input
Interrupt source ........... coincidence with compare register
2
Timer counter
3
:
8-bit
×
1
(square-wave output, event count, generation of remote control carrier, serial
0
baud rate timer)
Clock source................
1/4, 1/16
of system clock frequency;
1/1
of OSC oscillation clock frequency; external clock input
Interrupt source ........... coincidence with compare register
3
Timer counter
2, 3
can be cascade-connected.
Timer counter
4
:
16-bit
×
1
(square-wave/16-bit PWM output, event count, synchronous output event, input capture)
Clock source................
1/4, 1/16
of system clock frequency;
1/1
of OSC oscillation clock frequency; external clock input
Interrupt source ........... coincidence with compare register
4
Time base timer (one-minute count setting, independently operable
8-bit
timer counter
5)
Clock source................
1/4
of system clock frequency;
1/1, 1/8192
of OSC oscillation clock frequency;
1/1, 1/8192
of XI
oscillation clock frequency
Interrupt source ........... coincidence with compare register
5; 1/8192
prescaler overflow
Watchdog timer
Interrupt source ...........
1/65536, 1/262144, 1/1048576
of system clock frequency (ROM option)
Timer Counter
Serial interface
Serial
0
: synchronous type/simple UART (half-duplex)
×
1
Clock source................
1/2, 1/4, 1/16
of system clock frequency;
1/2
of timer counter
3
frequency
Serial
1
: synchronous type
×
1
Clock source................
1/2, 1/8, 1/64
of system clock frequency;
1/2
of timer counter
3
frequency
I/O Pins
I/O
Input
49
12
Common use, Specified pull-up resistor available , Input/output selectable (bit unit)
Specified pull-down resistor partially selectable
Common use, Specified pull-up resistor available, Specified pull-down resistor partially selectable
A/D converter
10-bit
×
8-ch.
(with S/H)
LCD
28
segments
×
4
commons (static ,
1/2, 1/3,
or
1/4
duty)
Buzzer output, remote control carrier signal output, high-current drive port
Display control function
Special Ports
MAD00015FEM
Request for your special attention and preca
semiconductors de
(1)
If any of the products or technical information described in thi
regulations of the exporting country, especially, those with regar
(2) The technical information described in this book is intended onl
of the products, and no license is granted under any intellectua
company. Therefore, no responsibility is assumed by our comp
company which may arise as a result of the use of technical info
(3) The products described in this book are intended to be used for s
equipment, communications equipment, measuring instruments
Consult our sales staff in advance for information on the followi
–
Special applications (such as for airplanes, aerospace, automo
systems and safety devices) in which exceptional quality and
ucts may directly jeopardize life or harm the human body.
–
Any applications other than the standard applications intended.
(4) The products and product specifications described in this book
provement. At the final stage of your design, purchasing, or u
Standards in advance to make sure that the latest specifications s
(5) When designing your equipment, comply with the range of a
(operating power supply voltage and operating environment etc
maximum rating on the transient state, such as power-on, powe
defect which may arise later in your equipment.
Even when the products are used within the guaranteed values
mode, possible to occur to semiconductor products. Measures o
or preventing glitch are recommended in order to prevent physic
(6) Comply with the instructions for use in order to prevent breakd
thermal stress and mechanical stress) at the time of handling, m
damp-proof packing is required, satisfy the conditions, such as s
(7) This book may be not reprinted or reproduced whether wholl
Electric Industrial Co., Ltd. Industrial Co., Ltd.
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
