CCD Delay Line Series
MN3867S
PAL-Compatible CCD Video Signal Delay Element
Overview
The MN3867S is a CCD signal delay element for video
signal processing applications.
It contains such components as a threefold-frequency
circuit, a shift register clock driver, charge I/O blocks,
two CCD analog shift registers switchable between 1700
and 617 stages and between 848.5 and 617 stages, a clamp
bias circuit, resampling output amplifiers, and booster
circuits.
When the switch input is "L" level, the MN38667S
samples the input using the supplied clock signal with a
frequency three times the PAL color signal subcarrier fre-
quency (4.43361875 MHz) and, after adding in the at-
tached filter delay, produces independent delays of 1 H
(the horizontal scan period) and 2 H for the two lines.
When the switch input is "H" level, the MN38667S dis-
ables the threefold-frequency circuit and samples the in-
put with the image sensor drive frequency (9.65625 MHz)
for the camera's 510 horizontal pixels and, after adding
in the attached filter delay, produces independent delays
of 1 H (the horizontal scan period) each for the two lines.
Pin Assignment
XIC
V
SS3
V
DD3
VINC1
N.C.
VINVC
VGC1
VO1C
V
DD1
V
SS1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
XIV
PCOUT
&
VCOIN
–V
BB
V
SS2
V
DD2
VINVY
SW
VINC2
VGC2
VO2Y
( TOP VIEW )
SOP020-P-0300C
Features
Single 5.0 V power supply
Choice of camera and VCR modes, so that both the
camera and VCR portions of a video camera with 510
horizontal pixels can use the same MN38667S for sig-
nal processing
Applications
Video cameras
1
CCD Delay Line Series
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Notes
1: Always connect V
DD1
, V
DD2
, and V
DD3
to the same voltage.
2: Always connect V
SS1
, V
SS2
, and V
SS3
to ground.
MN3867S
Symbol
XIC
V
SS3
V
DD3
VINC1
N.C.
VINVC
VGC1
VO1C
V
DD1
V
SS1
VO2Y
VGC2
VINC2
SW
VINVY
V
DD2
V
SS2
–V
BB
PCOUT&VCOIN
XIV
Pin Name
9.65625 MHz clock input
GND (3)
Power supply (3)
Camera signal input (1)
No connection
Video signal input (C)
Output gate connection (1)
Signal output (1C)
Power supply (1)
GND (1)
Signal output (2Y)
Output gate connection (2)
Camera signal input (2)
Camera/video mode switch
Video signal input (Y)
Power supply (2)
GND (2)
Substrate connection
Phase comparator output and voltage controlled
oscillator input
4.43361875 MHz clock input
Remarks
Ground for clock multiplier circuit
Power supply for clock multiplier circuit
Output pin for signal
fed to pin 4 or pin 6
Power supply for analog circuits
Ground for analog circuits
Output pin for signal
fed to pin 13 or pin 15
Power supply for digital circuits
other than frequency multiplier
Ground for digital circuits
other than frequency multiplier
Negative voltage pin
3
嵌入式系统
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