A/D, D/C Converters for Image Signal Processing
MN6576H
Low Power 9-Bit CMOS A/D Converter for Image Processing
Overview
The MN6576H is a high-speed 9-bit CMOS analog-to-
digital converter for image processing applications.
It uses a half flash structure based on chopper com-
parators and achieves both high speed and low power
consumption with multiplexing.
It provides separate power supply pins for the circuits
driving the low-voltage digital output pins.
Pin Assignment
DV
DDL
DV
SS
D6
D5
D4
D3
D2
18
24
23
22
21
20
19
D7
D8
25
26
27
28
29
30
31
1
2
3
4
5
6
7
17
D1
16
15
14
13
12
11
10
8
D0
TEST
AV
DD
AV
DD
AV
SS
V
RBS
V
RB
AV
SS
Features
Maximum conversion rate: 16 MSPS (min.)
Linearity error:
±2.5
LSB (typ.)
Differential linearity error:
±0.6
LSB (typ.)
Power supply voltage: 5.0 V or 3.3 V
Power consumption: 120 mW (typ.) (f
CLK
=16 MHz)
OVF
DV
SS
DV
DD
CLK
NOE
POWD
32
9
AV
DD
AV
DD
V
RTS
AV
SS
AV
SS
V
RT
Applications
Digital television receivers
Digital video equipment
Digital image processing equipment
(TOP VIEW)
QFH032-P-0707
V
RM
V
IN
1
2
MN6576H
Block Diagram
TEST
16
17
18
19
SS
15
14
AV
DD
13 AV
DD
12 AV
11
V
RBS
D0(LSB)
D1
D2
D3
31
10
V
RB
9 AV
SS
8
V
IN
7 AV
DD
6
V
RM
5
AV
DD
4 AV
SS
31
Upper comparator (5 bits)
Upper encoder (5 bits)
Clock generator
31
5
31
3 V
RT
2
V
RTS
1
AV
SS
DV
SS
20
21
DV
DDL
22
D4
23
D5
24
D6
25
D7
26
D8
27
OVF
28
DV
SS
29
DV
DD
30
CLK
31
NOE
32
POWD
Lower comparator A (4 bits)
Lower comparator B (4 bits)
31
31
Lower encoder A (4 bits)
Lower encoder B (4 bits)
5
A/D, D/C Converters for Image Signal Processing
Error
correction
and
data latch
5
A/D, D/C Converters for Image Signal Processing
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Symbol
AV
SS
V
RTS
V
RT
AV
SS
AV
DD
V
RM
AV
DD
V
IN
AV
SS
V
RB
V
RBS
AV
SS
AV
DD
AV
DD
TEST
D0
D1
D2
D3
DV
SS
DV
DDL
D4
D5
D6
D7
D8
OVF
DV
SS
DV
DD
CLK
NOE
POWD
Function Description
Ground for analog circuits
Reference voltage power supply (TOP)
Reference voltage input (TOP)
Ground for analog circuits
Power supply for analog circuits
Intermediate reference voltage
Power supply for analog circuits
Analog signal input
Ground for analog circuits
Reference voltage power supply (BOTTOM)
Reference voltage input (BOTTOM)
Ground for analog circuits
Power supply for analog circuits
Power supply for analog circuits
Test mode selection
Digital code output (LSB)
Digital code output
Digital code output
Digital code output
Ground for digital circuits
Power supply for low-voltage digital outputs
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output (MSB)
Overflow output
Ground for digital circuits
Power supply for digital circuits
Sampling clock
Output enable
Power down mode selection
MN6576H
3
MN6576H
Absolute Maximum Ratings
Parameter
Power supply voltage
A/D, D/C Converters for Image Signal Processing
Ta=25˚C
Symbol
V
DD
DV
DDL
V
I
V
O
T
opr
T
stg
Rating
– 0.3 to +7.0
– 0.3 to V
DD
+0.3
– 0.3 to V
DD
+0.3
– 0.3 to V
DD
+0.3
–20 to +70
–55 to +125
Unit
V
V
V
V
˚C
˚C
Power supply voltage for digital output circuits
Input voltage
Output voltage
Operating ambient temperature
Storage temperature
Recommended Operating Conditions
Parameter
Power supply voltage
Power supply voltage for digital output circuits
Digital input
voltage
"H" level
"L" level
"L" level
Clock
"H" level pulse width
"L" level pulse width
Analog input voltage
V
DD
=AV
DD
=DV
DD
=4.5V, DV
DDL
=3.0V, V
SS
=AV
SS
=DV
SS
=0V, Ta=25˚C
Symbol
V
DD
DV
DDL
V
IH
V
IL
V
RT
V
RB
t
WH
t
WL
V
AIN
min
4.50
3.0
2.4
V
SS
3.0
V
SS
25
25
V
SS
typ
5.00
max
5.25
3.6
V
DD
0.8
V
DD
2.0
Unit
V
V
V
V
V
V
ns
ns
Reference voltage "H" level
V
DD
V
Electrical Characteristics
Parameter
Power consumption
V
DD
=AV
DD
=DV
DD
=4.5V, DV
DDL
=3.0V, AV
SS
=DV
SS
=0V, Ta=25˚C
Symbol
Conditions
P
C
V
DD
=5.0V, DV
DDL
=3.3V,
f
CLK
=16MSPS
(not including reference current)
min
typ
120
max
150
Unit
mW
Resolution
Linearity error
Differential linearity error
Maximum conversion rate
Clock frequency
Analog input dynamic range
Output
current
"L" level
Output delay time
Analog input capacitance
"H" level
RES
E
L
E
D
F
C(max.)
f
CLK
D
R
I
OH
I
OL
t
d
C
I
V
OH
=DV
DDL
– 0.8V,
V
DD
=5.0V, DV
DDL
=3.3V
V
OL
=0.4V, V
DD
=5.0V
DV
DDL
=3.3V
V
DD
=5.0V, DV
DDL
=3.3V,
C
L
=10pF
V
DD
=5.0V
2
10
f
CLK
=16MSPS
V
RT
=3.3V
V
RB
=1.3V
16
1
2
9
±2.5
±0.6
±3.5
±1.0
bit
LSB
LSB
MSPS
16
V
RT
–V
RB
–2
MHz
V
mA
mA
30
26
45
ns
pF
4
A/D, D/C Converters for Image Signal Processing
Timing Chart
MN6576H
The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital
output 2.5 clock cycles later at the rising edge of the clock signal.
t
WH
Clock
t
WL
Analog input
N
N+1
N–2
t
d
(30ns)
N+2
N–1
N+3
N
N+4
N+1
Data output
N–3
Note: The circles indicate analog signal sampling points.
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