For Video Equipment
MN6761S
External Synchronization Control LSI for Color Video Cameras
Overview
The MN6761S is an external synchronization control
LSI for color video cameras.
When used in combination with a synchronizing signal
generator (MN67601NS or MN67602PS), it provides
external synchronization control for NTSC and PAL video
systems.
Pin Assignment
SCPSW1
SCPSW2
WHD
N/P
BGP
GLBSC
V
SS2
V
DD2
GLSYNC
TEST2
f
HP
HPCO
Xf
H
OSCI
Xf
H
OSCO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
4f
SC
4f
SC
OSCO
4f
SC
OSCI
SOPCO
SC1
V
DD1
V
SS1
TEST1
HBLK
EXT/INT
LSWCONT
LSW
VR
Xf
H
Features
Synchronization of both the video camera and the
VCR
External synchronization inputs:
Composite synchronizing signal and burst
subcarrier
External synchronization techniques
• Horizontal synchronization: phase-locked loop
• Vertical synchronization: reset technique
• Subcarrier synchronization: phase-locked loop
Support for both NTSC and PAL systems
Built-in feature for automatically switching between
external and internal synchronization
Built-in horizontal phase adjustment circuit
(TOP VIEW)
SOP028-P-0375
Applications
Color video cameras
MN6761S
Xf
H
OSCO
Xf
H
OSCI
Xf
H
HPCO
WHD
Block Diagram
VR
f
HP
3
11
12
16
13
14
f
V
V
separation
Monostable
multivibrator
Xf
H
oscillator
Phase
com-
parator
15
GLSYNC
f
H
H
separation
7
V
SS2
EXT/INT
Internal/external
synchronization
switch
9
8
V
DD2
19
N/P
4
HBLK and BGP
pulse generator
20
HBLK
CK
Line switch control
pulse generator
SC1
24 D
Shift register
18
23
22
LSWCONT
V
DD1
V
SS1
SCPSW1
90˚
Gate
Phase
com-
parator
1
0˚
Line
switch
SCPSW2
2
Selector
TEST2
17
10
4f
SC
generator
TEST1
5
6
21
26
27
25
28
4f
SC
BGP
For Video Equipment
LSW
4f
SC
OSCO
4f
SC
OSCI
SCPCO
GLBSC
For Video Equipment
Pin Descriptions
Pin No.
23
22
8
7
9
6
3
11
24
1
2
17
Symbol
V
DD1
V
SS1
V
DD2
V
SS2
GLSYNC
CLBSC
WHD
f
HP
SC1
SCPSW1
SCPSW2
LSW
Pin Name
Power supply
Power supply
Power supply
Power supply
External synchronizing
signal input
External burst
subcarrier input
Horizontal synchroni-
zation input
Monostable multi-
vibrator input
Subcarrier input
Subcarrier phase
switch inputs
Line switch input
MN6761S
Function Description
"H" level (5V) power supply for subcarrier circuits
"L" level (GND) power supply for subcarrier circuits
"H" level (5V) power supply for synchronizing signal
circuits
"L" level (GND) power supply for synchronizing signal
circuits
Input pin for composite synchronizing signal derived from
video signal (reference for horizontal and vertical signals)
Input pin for burst subcarrier signal derived from video
signal (reference for subcarrier signals)
Input pin for WHD signal from synchronizing signal
generator
Pin for connecting CR circuit for adjusting delay for analog
monostable multivibrator (thus adjusting horizontal phase)
Input pin for SC1 signal from synchronizing signal
generator
Pin selecting which of the four phase signals generated from
the SC1 signal goes to the phase comparator
For a PAL system, supply the LSW signal from the
synchronizing signal generator.
For an NTSC system, keep this pin at "H" level.
4
12
N/P
HPCO
NTSC/PAL selection
input
Horizontal phase
comparator output
"H" level selects NTSC operation;
"L" level, PAL operation.
This pin is at "L" level when the WHD signal, after passing
through the monostable multivibrator, leads the rising edge
of the HSYNC signal derived by separating off the
horizontal component of the GLSYNC signal and is at "H"
level when the signal lags. At all other times, it is in the
high-impedance state.
13
Xf
H
OSCI
Oscillator input for
the synchronization
circuits
Clock oscillator pins for the synchronization circuits.
Connect these pins to an inductor, capacitor, and variable
capacitor. (The pins have built-in feedback resistors.)
The circuit oscillates during external synchronization mode.
The oscillation stops for internal synchronization mode.
The oscillator frequency, Xf
H
is 14.31818 MHz (910f
H
) for
NTSC and 4.406 MHz (282f
H
) for PAL.
Clock output pin for synchronizing signal circuits.
This pin provides the clock (Xf
H
) for the external
synchronization mode and stays at "L" level for the internal
synchronization mode. Connect to the EX910f
H
I pin of the
synchronizing signal generator for NTSC operation and to
the EX282f
H
I pin for PAL operation.
14
Xf
H
OSCO
Oscillator output for
the synchronization
circuits
15
Xf
H
Clock output for
synchronizing signal
circuits
MN6761S
Pin Descriptions (continued)
Pin No.
16
Symbol
VR
Pin Name
Vertical reset output
For Video Equipment
Function Description
This pin generates a vertical reset pulse for the
V-SERATION interval detected in the GLSYNC signal.
Connect it to the VR pin of the synchronizing signal
generator.
25
SCPCO
Subcarrier phase
comparator output
This pin is at "L" level when the SC1 signal leads the
GLBSC signal and is at "H" level when the signal lags.
At all other times, it is in the high-impedance state.
Clock oscillator pins for the subcarrier circuits.
Connect these pins to a crystal oscillator, capacitor, and
variable capacitor. (The pins have built-in feedback resistors.)
The circuit oscillates during external synchronization mode.
The oscillation stops for internal synchronization mode.
The oscillator frequency, 4f
SC
, is 14.31818 MHz for NTSC
and 14.734 MHz for PAL.
26
4f
SC
OSCI
Oscillator input for
subcarrier circuits
27
4f
SC
OSCO
Oscillator output for
subcarrier circuits
28
4f
SC
Subcarrier clock output
Clock output from subcarrier circuits.
In external synchronization mode, this pin provides the
(4f
SC
) clock signal; in internal synchronization mode, it
remains at "L" level. Connect this pin to the EX4f
SC
I pin on
the synchronizing signal generator.
18
LSWCONT
Line switch polarity
control output
During PAL operation, this pin emits an error detection
pulse if the LSW polarity is wrong, and the chip reverses
the LSW polarity. During internal synchronization mode,
this pin remains at "L" level. Connect this pin to the
LSWCONT pin on the synchronizing signal generator.
19
EXT/INT
Automatic internal/
external switching
output
If the chip detects GLSYNC input, it switches to external
synchronization mode and drives this pin at "H" level.
Otherwise, it switches to internal synchronization mode and
drives this pin at "L" level. Connect this pin to the EXT/INT
pin on the synchronizing signal generator.
5
BGP
Burst gate pulse output
These pulses have a width of 2.5 µs (NTSC) or 2.3 µs
(PAL) and trail the rising edge of the HSYNC signal by
5.3 µs (NTSC) or 5.6 µs.
They are generated for only 10 H to 256 H (NTSC) or
304 H (PAL) after the VR pulse.
20
21
10
HBLK
TEST1
TEST2
Horizontal blanking
output
Test inputs
These pulses have a width of 8.9 µs (NTSC) or 8.8 µs
(PAL) and follow the rising edge of the HSYNC signal.
Leave these test inputs open. (The pins include built-in
pull-up resistors.)
For Video Equipment
Timing Chart
1. Horizontal synchronization block
MN6761S
This block compares the phases of the HSYNC signal derived by separating off the horizontal component of
the GLSYNC input and the WHD signal from the synchronizing signal generator after it has passed through
the monostable multivibrator. It is thus possible to adjust the horizontal phase by adjusting the CR integral
circuit's time constant.
GLSYNC
HSYNC
WHD
DELAY
WHD
Timing chart for horizontal pulse phase comparison
2. Vertical synchronization block
This block detects the V-SERATION interval in the GLSYNC input and generates a vertical reset (VR) pulse
with 0.5 H of the start of that interval. It then issues no pulses for 256 H (NTSC) or 304 H (PAL) after this
VR pulse.
GLSYNC
VR
2.2µs (NTSC)
1.8µs (PAL)
14.0µs (NTSC)
11.2µs (PAL)
Vertical reset pulse timing chart
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