CYW20730
Single-Chip Bluetooth Transceiver for
Wireless Input Devices
The Cypress CYW20730 is a Bluetooth 3.0-compliant, stand-alone baseband processor with an integrated 2.4 GHz transceiver. It is
ideal for wireless input device applications including game controllers, keyboards, 3D glasses, remote controls, gestural input devices,
and sensor devices. Built-in firmware adheres to the Bluetooth Human Interface Device (HID) profile and Bluetooth Device ID profile
specifications.
The CYW20730 radio has been designed to provide low power, low cost, and robust communications for applications operating in the
globally available 2.4 GHz unlicensed ISM band. It is fully compliant with Bluetooth Radio Specification 3.0.
The single-chip Bluetooth transceiver is a monolithic component implemented in a standard digital CMOS process and requires
minimal external components to make a fully compliant Bluetooth device. The CYW20730 is available in three package options: a 32-
pin, 5 mm × 5 mm QFN, a 40-pin, 6 mm × 6 mm QFN, and a 64-pin, 7 mm × 7 mm BGA.
Cypress Part Numbering Scheme
Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion,
there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides
Cypress ordering part number that matches an existing IoT part number.
Table 1. Mapping Table for Part Number between Broadcom and Cypress
Broadcom Part Number
BCM20730
BCM20730A2KML2GT
BCM20730A1KML2G
BCM20730A1KMLG
BCM20730A1KFBGT
BCM20730A2KFBG
BCM20730A1KFBG
BCM20730A1KML2GT
BCM20730A2KML2G
BCM20730A1KMLGT
BCM20730A2KFBGT
CYW20730
CYW20730A2KML2GT
CYW20730A1KML2G
CYW20730A1KMLG
CYW20730A1KFBGT
CYW20730A2KFBG
CYW20730A1KFBG
CYW20730A1KML2GT
CYW20730A2KML2G
CYW20730A1KMLGT
CYW20730A2KFBGT
Cypress Part Number
Acronyms and Abbreviations
In most cases, acronyms and abbreviations are defined on first use.
For a comprehensive list of acronyms and other terms used in Cypress documents, go to
http://www.cypress.com/glossary.
Applications
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Wireless pointing devices: mice, trackballs, gestural controls
Wireless keyboards
3D glasses
Remote controls
Game controllers
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Point-of-sale (POS) input devices
Remote sensors
Home automation
Personal health and fitness monitoring
Cypress Semiconductor Corporation
Document Number: 002-14824 Rev. *J
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised April 25, 2017
CYW20730
Features
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On-chip support for common keyboard and mouse interfaces
eliminates external processor
Programmable keyscan matrix interface, up to 8 × 20 key-
scanning matrix
3-axis quadrature signal decoder
Shutter control for 3D glasses
Infrared modulator
IR learning
Triac control
Triggered Broadcom Fast Connect
Supports Adaptive Frequency Hopping
Excellent receiver sensitivity
Bluetooth specification 3.0 compatible, including enhanced
power control (Unicast Connectionless Data)
Bluetooth HID profile version 1.0 compliant
Bluetooth Device ID profile version 1.3 compliant
Bluetooth AVRCP-CT profile version 1.3 compliant
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10-bit auxiliary ADC with 28 analog channels
On-chip support for serial peripheral interface (master and
slave modes)
Broadcom Serial Communications (BSC) interface (compatible
with Philips® (now NXP) I
2
C slaves)
Programmable output power control meets Class 2 or Class 3
requirements
Class 1 operation supported with external PA and T/R switch
Integrated ARM Cortex™-M3 based microprocessor core
On-chip power-on reset (POR)
Support for EEPROM and serial flash interfaces
Integrated low-dropout regulator (LDO)
On-chip software controlled power management unit
Three package types are available:
❐
32-pin QFN package (5 mm × 5 mm)
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40-pin QFN package (6 mm × 6 mm)
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64-pin BGA package (7 mm × 7 mm)
RoHS compliant
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Document Number: 002-14824 Rev. *J
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CYW20730
Figure 1. Functional Block Diagram
Muxed on GPIO
UART_TXD
UART_RXD
WDT
Processing
Unit
(ARM -CM3)
Test
UART
Tx RTS_N
Rx
CTS_N
SDA/
MOSI
1.2V
SCL/
SCK MISO
VDD_CORE
1.2V
1.2V VDD_CORE
Domain
Periph 320K
UART ROM
60K
RAM
BSC/SPI
Master
Interface
(BSC is I
2
C -
compa ble)
VSS,
VDDO,
VDDC
28 ADC
Inputs
1.2V
POR
1.2V
LDO
CT
ADC
1.425V to 3.6V
MIA
POR
System Bus
1.62V to 3.6V
32 kHz
LPCLK
hclk
(24 MHz to 1 MHz)
Peripheral
Interface
Block
RF Control
and Data
Volt. Trans
I/O Ring
Control
Registers
VDD_IO
Domain
I/O Ring Bus
Bluetooth
Baseband
Core
2.4 GHz
Radio
24
MHz
GPIO
Control/
Status
Registers
IR
Mod.
and
Learning
SPI
M/S
Keyboard
Matrix
Scanner
w/FIFO
3 -Axis
Mouse
Signal
Controller
3-D Glasses
and Triac
PMU
Power
WAKE
RF I/O
T/R
Switch
Frequency
Synthesizer
40 GPIO
IR
I/O
8 x 20
Scan
Matrix
6 Quadrature
Inputs (3 pair) +
High Current
Driver Controls
32 kHz
LPCLK
AutoCal
128 kHz
LPO
128 kHz
LPCLK
1.2V VDD_RF
Domain
28 ADC
Inputs
PWM
÷4
24 MHz
Ref Xtal
40 GPIO on the 64-pin BGA
(22 GPIO on the 40-pin QFN)
(14 GPIO on the 32-pin QFN)
1.62V to 3.6V
VDD_IO
32 kHz
IoT Resources
Cypress provides a wealth of data at
http://www.cypress.com/internet-things-iot
to help you to select the right IoT device for your
design, and quickly and effectively integrate the device into your design. Cypress provides customer access to a wide range of
information, including technical documentation, schematic diagrams, product bill of materials, PCB layout information, and software
updates. Customers can acquire technical documentation and software from the Cypress Support Community website
(http://community.cypress.com/).
Document Number: 002-14824 Rev. *J
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CYW20730
Contents
1. Functional Description ................................................. 5
1.1 Keyboard Scanner ................................................. 5
1.2 Mouse Quadrature Signal Decoder ....................... 6
1.3 Shutter Control for 3D Glasses ............................. 6
1.4 Infrared Modulator ................................................. 7
1.5 Infrared Learning ................................................... 7
1.6 Triac Control .......................................................... 8
1.7 Broadcom Proprietary Control Signaling and
Triggered Broadcom Fast Connect ...................... 8
1.8 Bluetooth Baseband Core ..................................... 8
1.9 ADC Port ............................................................... 9
1.10 Serial Peripheral Interface ................................. 10
1.11 Microprocessor Unit .......................................... 12
1.12 Integrated Radio Transceiver ............................ 14
1.13 Peripheral Transport Unit .................................. 15
1.14 Clock Frequencies ............................................. 15
1.15 GPIO Port .......................................................... 17
1.16 PWM .................................................................. 18
1.17 Power Management Unit ................................... 19
2. Pin Assignments ........................................................ 20
2.1 Pin Descriptions .................................................. 20
2.2 Ball Maps ............................................................. 28
3. Specifications ............................................................. 31
3.1 Electrical Characteristics ..................................... 31
3.2 RF Specifications ................................................ 34
3.3 Timing and AC Characteristics ............................ 36
4. Mechanical Information ............................................. 41
4.1 Tape Reel and Packaging Specifications ............ 44
5. Ordering Information .................................................. 45
A. Appendix: Acronyms and Abbreviations ................ 46
A.1 References .......................................................... 47
Document History .......................................................... 48
Sales, Solutions, and Legal Information ...................... 50
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CYW20730
1. Functional Description
1.1 Keyboard Scanner
The keyboard scanner is designed to autonomously sample keys and store them into buffer registers without the need for the host
microcontroller to intervene. The scanner has the following features:
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Ability to turn off its clock if no keys pressed.
Sequential scanning of up to 160 keys in an 8 x 20 matrix.
Programmable number of columns from 1 to 20.
Programmable number of rows from 1 to 8.
16-byte key-code buffer (can be augmented by firmware).
128 kHz clock – allows scanning of full 160-key matrix in about 1.2 ms.
N-key rollover with selective 2-key lockout if ghost is detected.
Keys are buffered until host microcontroller has a chance to read it, or until overflow occurs.
Hardware debouncing and noise/glitch filtering.
Low-power consumption. Single-digit µA-level sleep current.
1.1.1 Theory of Operation
The key scan block is controlled by a state machine with the following states:
Idle
The state machine begins in the idle state. In this state, all column outputs are driven high. If any key is pressed, a transition occurs
on one of the row inputs. This transition causes the 128 kHz clock to be enabled (if it is not already enabled by another peripheral)
and the state machine to enter the scan state. Also in this state, an 8-bit row-hit register and an 8-bit key-index counter is reset to 0.
Scan
In the scan state, a row counter counts from 0 up to a programmable number of rows minus 1. Once the last row is reached, the row
counter is reset and the column counter is incremented. This cycle repeats until the row and column counters are both at their
respective terminal count values. At that point, the state machine moves into the Scan-End state.
As the keys are being scanned, the key-index counter is incremented. This counter is the value compared to the modifier key codes
stored, or in the key-code buffer if the key is not a modifier key. It can be used by the microprocessor as an index into a lookup table
of usage codes.
Also, as the n-th row is scanned, the row-hit register is ORed with the current 8-bit row input values if the current column contains two
or more row hits. During the scan of any column, if a key is detected at the current row, and the row-hit register indicates that a hit
was detected in that same row on a previous column, then a ghost condition may have occurred, and a bit in the status register is set
to indicate this.
Scan End
This state determines whether any keys were detected while in the scan state. If yes, the state machine returns to the scan state. If
no, the state machine returns to the idle state, and the 128 kHz clock request signal is made inactive.
The microcontroller can poll the key status register.
Document Number: 002-14824 Rev. *J
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