DATASHEET
12 TO 36 MHZ 6TSOT VCXO
Description
Used in conjunction with an external pullable quartz crystal,
this monolithic integrated circuit replaces more costly
hybrid (canned) VCXO devices. The ICS726A is designed
primarily for data and clock recovery applications such as
ADSL modems, set-top box receivers, and telecom
systems.
The frequency of the on-chip VCXO is adjusted by an
external control voltage to the VIN pin. Since VIN is a high
impedance input, it can be driven directly from an PWM RC
integrator circuit. Frequency output increases with VIN
voltage input. The usable range of VIN is 0 to 3.3 V.
ICS726A
Features
•
Uses an inexpensive 12 to 36 MHz external crystal
•
Output frequency range of 12 to 36 MHz
•
On-chip VCXO with guaranteed pull range of ±115 ppm
minimum
•
VCXO tuning voltage 0 to 3.3 V
•
Packaged in 6-pin TSOT
•
Pb (lead) free package
Block Diagram
VDD
VIN
X1
12-36MHz
Pullable
Crystal
X2
Voltage
Controlled
Crystal
Oscillator
12-36MHz
GND
IDT®
12 TO 36 MHZ 6TSOT VCXO
1
ICS726A
REV E 021312
ICS726A
12 TO 36 MHZ 6TSOT VCXO
VCXO
Pin Assignment
X2
GND
CLK
1
2
3
6
5
4
X1
VI N
VDD
T S OT - 2 3 - 6
Pin Descriptions
Pin
Number
1
2
3
4
5
6
Pin
Name
X2
GND
CLK
VDD
VIN
XI
Pin
Type
Input
Power
Output
Power
Input
Input
Connect to ground.
Pin Description
Crystal connection. Connect to the external pullable crystal.
VCXO CMOS level clock output at the frequency of the crystal.
Connect to +3.3 V (0.01µf decoupling capacitor recommended).
Voltage input to VCXO — 0 to 3.3 V analog input which controls the
oscillation frequency of the VCXO.
Crystal connection. Connect to the external pullable crystal.
reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the following section shown must be
followed.
The frequency of oscillation of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
ICS726A incorporates on-chip variable load capacitors that
“pull” (change) the frequency of the crystal. The crystal
specified for use with the ICS726A is designed to have zero
frequency error when the total of on-chip + stray
capacitance is 8.9 pF.
External Component Selection
The ICS726A requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD (pin 4) and GND (pin 2), as close to these
pins as possible. For optimum device performance, the
decoupling capacitor should be mounted on the component
side of the PCB. Avoid the use of vias in the decoupling
circuit.
Series Termination Resistor
When the PCB trace between the clock output (CLK, pin 3)
and the load is over 1 inch, series termination should be
used. To series terminate a 50Ω trace (a commonly used
trace impedance) place a 33Ω resistor in series with the
clock line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20Ω
.
Required Crystal Parameters:
Nominal Frequency
as required MHz
Initial Accuracy at 25
°
C
-20 min/+20 max ppm
Temperature Stability
-30 min/+30 max ppm
Aging, 1st year
-5 min/+5 max ppm
Aging, 10 years
-20 min/+20 max ppm
Operating Temp. Range, °C
0 min/+25 typ/+70 max
or
Operating Temp. Range, °C -40 min/+25 typ/+85 max
Load Capacitance
8.6 pf
Shunt Capacitance, C0
7 pF Max
C0/C1 Ratio
270 Max
Equivalent Series Resistance
35
Ω
Max
2
ICS726A
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Quartz Crystal
The ICS726A VCXO function consists of the external crystal
and the integrated VCXO oscillator circuit. To assure the
best system performance (frequency pull range) and
IDT®
12 TO 36 MHZ 6TSOT VCXO
ICS726A
12 TO 36 MHZ 6TSOT VCXO
VCXO
The third overtone mode of the crystal and all spurs must be
>100 ppm distant from the 3x fundamental resonance
measured with a physical load of 8.6pF.
The external crystal must be connected as close to the chip
as possible and should be on the same side of the PCB as
the ICS726A. There should be no vias between the crystal
pins and the X1 and X2 device pins. There should be no
signal traces underneath or close to the crystal. See
application note MAN05.
The value for each of these caps (in pF) is given by:
= 2 x (centering error)/ (trim sensitivity)
Trim sensitivity is a parameter which can be supplied by your
crystal vendor or calculated using the following formula:
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
To determine the value of the crystal capacitors:
1. Connect VDD of the ICS726A to 3.3 V. Connect pin 5of
the ICS726A to the second power supply. Adjust thevoltage
on pin 5 to 0V. Measure and record the frequency ofthe CLK
output. (f
0V
)
2. Adjust the voltage on pin 5 to 3.3 V. Measure and record
the frequency of the same output. (f
high
)
Error
xtal
= actual initial accuracy (in ppm) of the crystal being
measured.
If the centering error is less than ±25 ppm, no adjustment is
needed. If the centering error is more than 25 ppm negative,
the PC board has excessive stray capacitance and a new
PCB layout should be considered to reduce stray
capacitance. (Alternately, the crystal may be re-specified to
a higher load capacitance. Contact IDT for details.) If the
centering error is more than 25 ppm positive, add identical
fixed centering capacitors from each crystal pin to ground.
IDT®
12 TO 36 MHZ 6TSOT VCXO
3
ICS726A
REV E 021312
ICS726A
12 TO 36 MHZ 6TSOT VCXO
VCXO
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS726A. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
260° C
Recommended Operating Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
Min.
0
+3.15
Typ.
Max.
+70
+3.45
Units
°
C
V
Refer to page 3
DC Electrical Characteristics
VDD = 3.3 V ±5%
, Ambient temperature 0 to +70° C, unless stated otherwise
Parameter
Operating Voltage
Output High Voltage
Output Low Voltage
Output High Voltage (CMOS
Level)
Operating Supply Current
Short Circuit Current
VIN, VCXO Control Voltage
Symbol
VDD
V
OH
V
OL
V
OH
IDD
I
OS
V
IA
Conditions
I
OH
= -12 mA
I
OL
= 12 mA
I
OH
= -4 mA
Output = 12 MHz,
no load
Min.
3.15
2.4
Typ.
Max.
3.45
0.4
Units
V
V
V
V
VDD-0.4
5
±50
0
3.3
mA
mA
V
IDT®
12 TO 36 MHZ 6TSOT VCXO
4
ICS726A
REV E 021312
ICS726A
12 TO 36 MHZ 6TSOT VCXO
VCXO
AC Electrical Characteristics
VDD = 3.3 V ±5%,
Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Output Frequency
Crystal Pullability,
Note 2
VCXO Gain
Output Rise Time
Output Fall Time
Output Clock Duty
Cycle
Maximum Output
Jitter, short term
Symbol
F
O
F
P
Conditions
0V< VIN < 3.3 V, Note 1
VIN = VDD/2 ± 1 V, Note 1
Min.
12
±115
Typ.
Max. Units
36
MHz
ppm
140
0.8
0.8
40
50
100
1.5
1.5
60
ppm/V
ns
ns
%
ps
t
OR
t
OF
t
D
t
J
0.8 to 2.0 V, C
L
=15 pF
2.0 to 0.8 V, C
L
=15 pF
Measured at 1.4 V, C
L
=15 pF
C
L
=15 pF
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
Marking Diagram
26AL
Notes:
1. ‘26AL’ denotes part number.
2. “L” denotes Pb (lead) free package.
3. Bottom marking: ‘####’ denotes last 4 digits of lot number
IDT®
12 TO 36 MHZ 6TSOT VCXO
5
ICS726A
REV E 021312
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